Oh-RAM! One and a Half Round Atomic Memory

Implementing atomic read/write shared objects in a message-passing system is an important problem in distributed computing. Considering that communication is the most expensive resource, efficiency of read and write operations is assessed primarily in terms of the needed communication and the associated latency. Attiya, Bar-Noy, and Dolev established that two communication round-trip phases involving in total four message exchanges are sufficient to implement atomic operations when a majority of processors are correct. Subsequently Dutta et al. showed that one round involving two communication exchanges is sufficient as long as the system adheres to certain constraints with respect to crashes on the number of readers and writers in the system. It was also observed that three exchanges are sufficient in some settings.

This extended abstract presents work that explores algorithms where operations are able to complete in three message exchanges without imposing constraints on the number of participants, i.e., the aim is One and half Round Atomic Memory, hence the name Oh-RAM! Recently Hadjistasi et al. showed that three-exchange implementations are impossible in the MWMR (multi-writer/multi-reader) setting. This paper shows that this is achievable in the SWMR (single-writer/multi-reader) setting, and also achievable for read operations in the MWMR setting by “sacrificing” the performance of write operations. In particular, a SWMR implementation is presented, where reads complete in three and writes complete in two exchanges. Next, a MWMR implementation is given, where reads involve three and writes involve four exchanges. In light of the impossibility result these algorithms are optimal in terms of the number of communication exchanges. Both algorithms are then refined to allow some reads to complete in just two exchanges. These algorithms are evaluated and compared using the NS3 simulator with different topologies and operation loads.