Parallel Implementations of Cellular Automata for Traffic Models

The Biham-Middleton-Levine (BML) traffic model is a simple two-dimensional discrete Cellular Automaton (CA) that has been used to study self-organization and phase transitions in traffic flows. From the computational point of view, the BML model exhibits the usual features of discrete CA, where the new state of each cell is computed according to simple rules involving its current state and that of the immediate neighbors. In this paper we evaluate the impact of various optimizations for speeding up CA computations on shared-memory parallel architectures using the BML model as a case study. In particular, we analyze parallel implementations of the BML automaton for multicore CPUs and GPUs. Experimental evaluation provides quantitative measures of the payoff of different optimization techniques. Contrary to popular claims of “double-digit speedups” of GPU versus CPU implementations, our findings show that the performance gap between CPU and GPU implementations of the BML traffic model can be greatly reduced by clever exploitation of all available CPU features.