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2017 | OriginalPaper | Chapter

Scalable Fine-Grained Metric-Based Remeshing Algorithm for Manycore/NUMA Architectures

Authors : Hoby Rakotoarivelo, Franck Ledoux, Franck Pommereau, Nicolas Le-Goff

Published in: Euro-Par 2017: Parallel Processing

Publisher: Springer International Publishing

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Abstract

In this paper, we present a fine-grained multi-stage metric-based triangular remeshing algorithm on manycore and NUMA architectures. It is motivated by the dynamically evolving data dependencies and workload of such irregular algorithms, often resulting in poor performance and data locality at high number of cores. In this context, we devise a multi-stage algorithm in which a task graph is built for each kernel. Parallelism is then extracted through fine-grained independent set, maximal cardinality matching and graph coloring heuristics. In addition to index ranges precalculation, a dual-step atomic-based synchronization scheme is used for nodal data updates. Despite its intractable latency-boundness, a good overall scalability is achieved on a NUMA dual-socket Intel Haswell and a dual-memory Intel KNL computing nodes (64 cores). The relevance of our synchronization scheme is highlighted through a comparison with the state-of-the-art.

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Footnotes
1
The two cells \((\mathsf {K}_1,\mathsf {K}_2)\) sharing this edge, and the stencil \(\mathcal {N}[v_k]\) of each \(v_k \in \mathsf {K}_i\).
 
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Metadata
Title
Scalable Fine-Grained Metric-Based Remeshing Algorithm for Manycore/NUMA Architectures
Authors
Hoby Rakotoarivelo
Franck Ledoux
Franck Pommereau
Nicolas Le-Goff
Copyright Year
2017
DOI
https://doi.org/10.1007/978-3-319-64203-1_43

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