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Creating a Tool Set for Optimizing Topology-Aware Node Mappings Read chapter Read first chapter

2012 | OriginalPaper | Chapter

8. Trace-Based Performance Analysis for Hardware Accelerators

Author : Guido Juckeland

Published in: Tools for High Performance Computing 2011

Publisher: Springer Berlin Heidelberg

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Abstract

Hardware accelerators have changed the HPC landscape as they open a potential route to exascale computing. At the same time they also complicate the tasl of application development since they introduce another level of parallelism and, thus, complexity. Performance tool support to aid the developer will be a necessity. While profiling is offered by the accelerator vendors, tracing tools can also adopt hardware accelerators. A number of challenges for data acquisition and visualization and their solutions are presented in this paper.

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previous chapter Score-P: A Joint Performance Measurement Run-Time Infrastructure for Periscope, Scalasca, TAU, and Vampir
next chapter Folding: Detailed Analysis with Coarse Sampling
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Metadata
Title
Trace-Based Performance Analysis for Hardware Accelerators
Author
Guido Juckeland
Copyright Year
2012
Publisher
Springer Berlin Heidelberg
Book
Tools for High Performance Computing 2011

Print ISBN: 978-3-642-31475-9

Electronic ISBN: 978-3-642-31476-6

Copyright Year: 2012

DOI
https://doi.org/10.1007/978-3-642-31476-6_8