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Soft Errors from Space to Ground: Historical Overview, Empirical Evidence, and Future Trends Read chapter Read first chapter

2011 | OriginalPaper | Chapter

5. Circuit and System Level Single-Event Effects Modeling and Simulation

Author : Dan Alexandrescu

Published in: Soft Errors in Modern Electronic Systems

Publisher: Springer US

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Abstract

This chapter covers the behavior of complex circuits and systems in the presence of single-event effects, and the transformation of the related faults to errors and errors to functional failures. In addition, an overview of practical methods and techniques for single-event effects analysis is presented, attempting to help the reliability engineers to cope with the single-event rate constraints of modern designs.

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previous chapter Gate Level Modeling and Simulation
next chapter Hardware Fault Injection
Footnotes
1
We have improperly adopted the notion of SER and FIT (Chap.​ 3) to this context. SER actually means Soft Error Rate and should measure the number of genuine soft errors, that is, errors whose effects on the circuit operation are only determined by the function of the circuit. But an SET is a transient perturbation of a combinational circuit node, whose effect on the circuit depends on its occurrence time and its duration, as well as the structural implementation (net-list) and the temporal characteristics of the circuit. This is also the case for an SEU affecting a sequential element, as its impact on the circuit operation depends on the time of its occurrence and on the temporal characteristics of the circuit. Remember also that FIT means failure in time, while an SET or an SEU does not necessarily induce a failure.
 
2
This means that the latching probability of a pulse will be given by cw/(t setup + t hold), where cw is the part of the latching window covered by the pulse. This assumption may not be accurate enough for individual values of cw. When cw/(t setup + t hold) is close to 0, the latching probability of the pulse will be lower than cw/(t setup + t hold), while for cw/(t setup + t hold) close to 1, the latching probability will be larger than cw/(t setup + t hold). However, when considering the cumulative probability for the interval 0 < cw/(t setup + t hold) < 1, these differences will cancel one another at a large extent, resulting in a result of good accuracy.
 
3
For PWSET < t setup + t hold, the cancellation of the variances from this assumption may not work as well as was discussed in the case of SEUs.
 
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Metadata
Title
Circuit and System Level Single-Event Effects Modeling and Simulation
Author
Dan Alexandrescu
Copyright Year
2011
Publisher
Springer US
Book
Soft Errors in Modern Electronic Systems

Print ISBN: 978-1-4419-6992-7

Electronic ISBN: 978-1-4419-6993-4

Copyright Year: 2011

DOI
https://doi.org/10.1007/978-1-4419-6993-4_5