1997 | OriginalPaper | Chapter
Design and Implementation of an Interface Control Unit for Rapid Prototyping
Author : Mohammad S. Khan
Published in: Application Specific Processors
Publisher: Springer US
Included in: Professional Book Archive
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A major difficulty in rapid prototyping digital signal processing systems is the interconnection of processors with tailored networks. This difficulty can be alleviated by utilizing a standardized processor-to-processor interface. This approach permits the configuration of application specific hardware, with arbitrary hardware redundancy, to match the signal flow graph of specific applications. The hardware is mapped to the application as opposed to the traditional approach of mapping the application to the hardware. An inventory of heterogeneous processors, specialized to perform a predefined set of functions, enables rapid prototyping of systems with arbitrary topologies and functionalities. Application specific systems that match the signal flow graph of applications outperform general purpose systems both in speed and throughput.This research focuses on solving the problems associated with the interconnection of the heterogeneous building blocks into systems with arbitrary topologies. A communication architecture is proposed that allows the interconnection of processors with varying speed and functionalities. Standardization of the Interface Control Unit (ICU) greatly reduces the development cost and time by removing the need to design and develop custom interfaces.A robust event transaction protocol has been developed which eliminates centralized control and synchronization. The communication protocol is designed to be self-organizing and self-synchronizing by distributing control functions among the individual system resources through the Interface Control Unit (lCU). The protocol is optimized and verified by simulation using Rainbow Nets. Using this approach, it is possible to investigate variables in system configuration, application algorithms, and VLSI technology parameters separately. A gate-level synchronous design of the ICU is developed using LSI Logic Inc., LCA300K Technology. This is a CMOS technology with a minimum feature size of 0.7 micron.