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2014 | OriginalPaper | Chapter

Design of Neuromorphic Architectures with Memristors

Authors : Dhireesha Kudithipudi, Cory Merkel, Mike Soltiz, Garrett S. Rose, Robinson E. Pino

Published in: Network Science and Cybersecurity

Publisher: Springer New York

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Abstract

Next-generation high-performance computing processors have a pressing need to expand their computation capabilities to support massively parallel applications. Moreover, conventional Von Neumann based architectures cannot meet these complex computational demands. Neuromorphic architectures, which improve the efficiency and robustness of complex computations by emulating the behavior of biological processes in hardware, offer a viable alternative solution. In this chapter, we discuss the design criteria and challenges to realize such architectures using emerging memristor technology. In particular, the memristor models, synapse circuits, fundamental processing units (neural logic blocks) for the neuromorphic architectures, and hybrid CMOS/memristor neural network (CMHNN) topologies using supervised learning will be presented for different benchmarks.

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Metadata
Title
Design of Neuromorphic Architectures with Memristors
Authors
Dhireesha Kudithipudi
Cory Merkel
Mike Soltiz
Garrett S. Rose
Robinson E. Pino
Copyright Year
2014
Publisher
Springer New York
DOI
https://doi.org/10.1007/978-1-4614-7597-2_6

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