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Journal of Electronic Testing
Published in: Journal of Electronic Testing 5/2011

01-10-2011

Editorial

Author: Vishwani D. Agrawal

Published in: Journal of Electronic Testing | Issue 5/2011

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Excerpt

This issue of JETTA contains eight papers including one JETTA Letter. The topics covered are design for testability, test data compression, mixed-signal test, fault-tolerance, interconnect testing, and testing of microfluidic circuits. The second paper is derived from the program of IEEE European Test Symposium (ETS) of 2010. The fourth and fifth papers had their initial presentations made at the IEEE Latin-American Test Workshop (LATW) of 2010. Cecilia Metra (ETS) and Fabian Vargas (LATW) once again deserve credit for the editing of these papers. …
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Metadata
Title
Editorial
Author
Vishwani D. Agrawal
Publication date
01-10-2011
Publisher
Springer US
Published in
Journal of Electronic Testing / Issue 5/2011
Print ISSN: 0923-8174
Electronic ISSN: 1573-0727
DOI
https://doi.org/10.1007/s10836-011-5254-3

Other articles of this Issue 5/2011

Journal of Electronic Testing 5/2011 Go to the issue

OriginalPaper

Test Planning in Digital Microfluidic Biochips Using Efficient Eulerization Techniques

OriginalPaper

Wavelet Neural Network Approach for Testing of Switched-Current Circuits

Letter

Analog Circuit Fault Detection Using Location of Poles

News

Test Technology Newsletter

Erratum

Erratum to: A Cost-Efficient Self-Configurable BIST Technique for Testing Multiplexer-Based FPGA Interconnect

OriginalPaper

Reliability Limits of TMR Implemented in a SRAM-based FPGA: Heavy Ion Measures vs. Fault Injection Predictions