Effect of GaN Substrate Properties on Vertical GaN PiN Diode Electrical Performance

Present GaN technology consists primarily of heteroepitaxial, lateral high electron mobility transistors; however, high-power devices would be much more efficiently manufactured with a vertical geometry due to better blocking voltage scaling. This technology has yet to be realized due to the inconsistency of GaN wafer properties. These inconsistencies can be detected with several long-range, non-destructive techniques including Raman spectroscopy, optical profilometry, and photoluminescence mapping. In particular, Raman spectroscopy is an effective tool for determining the carrier concentration of GaN substrates and whether the wafers are uniform or inhomogeneous. In this work, vertical p-i-n GaN diodes are fabricated using both uniform and inhomogeneous wafers determined by using the A₁ Raman peak position to monitor carrier concentration. The inhomogeneous samples have regular patterns of varying conductivity as a result of electron-donating defects brought about by changes in crystal stress. By avoiding these defects, we have found that diode performance improves by increasing the +/− 10 V rectification ratio by up to a factor of 5X and reducing the 200 V reverse bias leakage current by several orders of magnitude. Using the higher quality substrates with uniform electron carrier concentrations can improve the rectification ratio by another order of magnitude.