Error reduction of SRAM-based physically unclonable function for chip authentication

SRAM-based physically unclonable function (PUF) is an attractive security primitive for cryptographic protocol and security architecture because SRAM itself is one of the most widely used embedded memories. In terms of robustness, however, there is a weakness for SRAM PUF owing to a bit error; thus, a method must be explored to reduce this error. In this work, a novel hardware chip to characterize cell-to-cell entropy is demonstrated for robust SRAM based PUF by implementation of a screening test to filter out poor cells. We design a chip with a power controller, circuits for error correction coding, a SRAM array and central processing unit. Then it was fabricated by a foundry service. We also propose a procedure to suppress the bit error by use of a screening test, which is based on SRAM cells possessing their own entropy. Through the screening test, the bit error rate (BER) is reduced to below \({10}^{-6}\), which is much smaller than the BER of 0.05 in previous reports, i.e., the robustness is notably improved. Moreover, this robustness was evaluated in terms of an error correction code (ECC) failure rate and temperature after the screening test. SRAM-based PUF with enhanced robustness can contribute to implementing a security protocol and architecture for chip authentication.