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2010 | OriginalPaper | Chapter

3. Hardware Security Challenges

Authors : Dr. Ted Huffmire, Dr. Cynthia Irvine, Thuy D. Nguyen, Timothy Levin, Dr. Ryan Kastner, Dr. Timothy Sherwood

Published in: Handbook of FPGA Design Security

Publisher: Springer Netherlands

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Abstract

This chapter discusses the problem of malicious hardware, or gateware, on FPGAs. Categories of malicious hardware, the problem of foundry trust, and attacks facilitated by malicious inclusions are presented. This chapter also explains the problem of covert channels on FPGAs, with a formal definition of a covert channel in general and a description of the specific case of covert channels on FPGAs. Methods for detecting and mitigating these covert channels are also described.

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Metadata
Title
Hardware Security Challenges
Authors
Dr. Ted Huffmire
Dr. Cynthia Irvine
Thuy D. Nguyen
Timothy Levin
Dr. Ryan Kastner
Dr. Timothy Sherwood
Copyright Year
2010
Publisher
Springer Netherlands
DOI
https://doi.org/10.1007/978-90-481-9157-4_3