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Erschienen in:
Introduction and Motivation Kapitel lesen Erstes Kapitel lesen

2010 | OriginalPaper | Buchkapitel

3. Hardware Security Challenges

verfasst von : Dr. Ted Huffmire, Dr. Cynthia Irvine, Thuy D. Nguyen, Timothy Levin, Dr. Ryan Kastner, Dr. Timothy Sherwood

Erschienen in: Handbook of FPGA Design Security

Verlag: Springer Netherlands

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Abstract

This chapter discusses the problem of malicious hardware, or gateware, on FPGAs. Categories of malicious hardware, the problem of foundry trust, and attacks facilitated by malicious inclusions are presented. This chapter also explains the problem of covert channels on FPGAs, with a formal definition of a covert channel in general and a description of the specific case of covert channels on FPGAs. Methods for detecting and mitigating these covert channels are also described.

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Vorheriges Kapitel High Assurance Software Lessons and Techniques
Nächstes Kapitel FPGA Updates and Programmability
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Metadaten
Titel
Hardware Security Challenges
verfasst von
Dr. Ted Huffmire
Dr. Cynthia Irvine
Thuy D. Nguyen
Timothy Levin
Dr. Ryan Kastner
Dr. Timothy Sherwood
Copyright-Jahr
2010
Verlag
Springer Netherlands
Buch
Handbook of FPGA Design Security

Print ISBN: 978-90-481-9156-7

Electronic ISBN: 978-90-481-9157-4

Copyright-Jahr: 2010

DOI
https://doi.org/10.1007/978-90-481-9157-4_3

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