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2021 | OriginalPaper | Chapter

High-Throughput VLSI Architectures for VLSI Signal Processing

Authors : R. Ashok Chaitanya Varma, M. Venkata Subbarao, D. Ramesh Varma, G. R. L. V. N. S. Raju

Published in: Microelectronics, Electromagnetics and Telecommunications

Publisher: Springer Singapore

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Abstract

The purpose of this work is to develop VLSI DSP architectures for CRC-32 generator polynomial equation to improve better throughput with less number of clock pulses. In this paper, IIR filter-based design method is proposed. Different levels of architectures are proposed to achieve the requirement. LFSR is used in developing VLSI DSP architectures. These architectures had been implemented in Xilinx tool.

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Title: High-Throughput VLSI Architectures for VLSI Signal Processing
Authors: R. Ashok Chaitanya Varma
M. Venkata Subbarao
D. Ramesh Varma
G. R. L. V. N. S. Raju
Publisher: Springer Singapore
Book: Microelectronics, Electromagnetics and Telecommunications
Print ISBN: 978-981-15-3827-8

Electronic ISBN: 978-981-15-3828-5

Copyright Year: 2021
DOI: https://doi.org/10.1007/978-981-15-3828-5_37