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2015 | OriginalPaper | Chapter

89. Implementation Method for Class-J Power Amplifiers

Authors : Tao Chen, Xiaohong Sun, Feng Wang, Jianhui Wu

Published in: Proceedings of the Second International Conference on Mechatronics and Automatic Control

Publisher: Springer International Publishing

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Abstract

This chapter presents an implementation method for Class-J power amplifiers. The requirement for the load impedances of Class-J power amplifiers is analyzed first. Then an output matching structure is proposed for low-optimum-load impedance condition. It uses a short-terminated transmission line to supply the collector voltage of the power amplifier and meet the requirement for the second harmonic impedance. To verify this method, a one-stage common emitter power amplifier using 2-µm gallium arsenide heterojunction bipolar transistor (GaAs HBT) process has been designed and a Class-J power amplifier is implemented with the component on printed circuit board (PCB) board. The implemented Class-J power amplifier exhibits a 55 % collector efficiency with the saturated output power of 34.2 dBm at the frequency of 2.14 GHz and 3.5 V supply voltage.

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Metadata
Title
Implementation Method for Class-J Power Amplifiers
Authors
Tao Chen
Xiaohong Sun
Feng Wang
Jianhui Wu
Copyright Year
2015
Book
Proceedings of the Second International Conference on Mechatronics and Automatic Control

Print ISBN: 978-3-319-13706-3

Electronic ISBN: 978-3-319-13707-0

Copyright Year: 2015

DOI
https://doi.org/10.1007/978-3-319-13707-0_89