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The Journal of Supercomputing
Published in: The Journal of Supercomputing 4/2016

01-04-2016

Joint frequency scaling of processor and DRAM

Authors: Vaibhav Sundriyal, Masha Sosonkina

Published in: The Journal of Supercomputing | Issue 4/2016

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Abstract

Energy efficiency and energy-proportional computing have become a central focus in modern supercomputers. Many previous energy-saving strategies have focused solely on the CPU while the DRAM subsystem has not been addressed sufficiently, even though memory consumes about 20 % of the total power in a typical server platform. This paper describes a novel runtime system that scales the frequency of both processor and DRAM-based on the performance and power models, also proposed here. Specifically, first, a performance-loss constraint is chosen for an application, then, an optimal processor–DRAM frequency pair is modeled such that the pair minimizes the energy consumption in a given timeslice. Experiments performed on SPEC CPU™ 2006, NAS NPB, and pARMS benchmarks demonstrate that the proposed runtime system may obtain total energy savings both for memory- and compute-intensive applications. In particular, as much as 22 % of energy was saved with a low performance loss of about 4.8 %.
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Footnotes
2
Authors’ previous work [31] outlines the pitfalls of the models relying on the user-defined performance-loss tolerance and introduces a model based on instantaneous power consumption.
 
6
SPEC CPU™ 2006 benchmarks web-site: https://​www.​spec.​org/​cpu2006/​.
 
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Metadata
Title
Joint frequency scaling of processor and DRAM
Authors
Vaibhav Sundriyal
Masha Sosonkina
Publication date
01-04-2016
Publisher
Springer US
Published in
The Journal of Supercomputing / Issue 4/2016
Print ISSN: 0920-8542
Electronic ISSN: 1573-0484
DOI
https://doi.org/10.1007/s11227-016-1680-4

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