Memory Address Computation for DSPs

In this chapter, we describe two code optimization techniques for DSPs, which exploit the special address generation hardware in such processors. These optimizations are very “low-level” in the compilation flow, because they demand that machine code, in the form of sequential assembly code with symbolic variables, has already been generated in earlier phases (fig. 2.1). One degree of freedom that can be exploited at this point is the way in which symbolic variables are laid out in memory and how the memory addresses of the variables are computed at program runtime.