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Published in:
High-k Dielectric for Nanoscale MOS Devices Read chapter Read first chapter

2017 | OriginalPaper | Chapter

5. Passivation and Characterization in High-k/III–V Interfaces

Authors : Shengkai Wang, Honggang Liu

Published in: Outlook and Challenges of Nano Devices, Sensors, and MEMS

Publisher: Springer International Publishing

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Abstract

III–V compound semiconductors are regarded as promising candidates to replace silicon channel for future metal-oxide-semiconductor field effect transistors (MOSFETs) because of their high mobility. However, compared with Si-MOSFETs, lack of high quality high-k gate stack hampers the development of III–Vs MOSFETs. Therefore, for high-k/III–Vs, interface passivation and characterization become very important to realize high-performance devices.
In this chapter, after a brief review about the background and the history of III–V MOSFETs, we select several typical high-k/III–V stacks, such as high-k/InP, high-k/GaSb, high-k/GaAs, to illustrate the impacts and mechanism of various passivation methods on them. Moreover, some effective electrical and optical characterization methods for high-k/III–V system are also introduced and discussed.

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Metadata
Title
Passivation and Characterization in High-k/III–V Interfaces
Authors
Shengkai Wang
Honggang Liu
Copyright Year
2017
Book
Outlook and Challenges of Nano Devices, Sensors, and MEMS

Print ISBN: 978-3-319-50822-1

Electronic ISBN: 978-3-319-50824-5

Copyright Year: 2017

DOI
https://doi.org/10.1007/978-3-319-50824-5_5