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2013 | OriginalPaper | Chapter

13. Trivium Crypto-Coprocessor

Author : Patrick R. Schaumont

Published in: A Practical Introduction to Hardware/Software Codesign

Publisher: Springer US

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Abstract

Stream ciphers are complex state machines that generate an infinite stream of pseudo-random bits starting from a single key. These bits can be used as a keystream in encryption and decryption operations. In this chapter we’ll discuss the implementation of such a stream cipher algorithm, called Trivium, as a co-processor. The co-processor is attached to a host processor. The software on that host processor initializes the Trivium coprocessor, and retrieves a very long (infinite) keystream. We consider different types of host processors, including an 8-bit 8051 micro-controller, a 32-bit StrongARM RISC, and a 32-bit Microblaze processor. We will evaluate the impact of different types of hardware-software interfaces on the performance of the overall design. We will also investigate the path to implementation on an FPGA.

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Metadata
Title
Trivium Crypto-Coprocessor
Author
Patrick R. Schaumont
Copyright Year
2013
Publisher
Springer US
DOI
https://doi.org/10.1007/978-1-4614-3737-6_13