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2001 | OriginalPaper | Chapter

3D Thermal Analysis for SOI and its impact on Circuit Performance

Authors : R. V. Joshi, IS. S. Kang, C. T. Chuang

Published in: Simulation of Semiconductor Processes and Devices 2001

Publisher: Springer Vienna

Included in: Professional Book Archive

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3D-thermal analysis for multifinger devices is developed for partially depleted SOI and Cu interconnects. Using this technique the temperature rise for multifinger devices is at least a factor of 3 higher than predicted by I-D thermal resistance models.Also increase in temperature degrades the performance incrementally.

previous chapter Two-Dimensional Model for the Subthreshold Slope in Deep-Submicron Fully-Depleted SOI MOSFET’s

next chapter Modelling of High-Voltage SOI-LDMOS Transistors including Self-Heating

Title: 3D Thermal Analysis for SOI and its impact on Circuit Performance
Authors: R. V. Joshi
IS. S. Kang
C. T. Chuang
Publisher: Springer Vienna
Book: Simulation of Semiconductor Processes and Devices 2001
Print ISBN: 978-3-7091-7278-0

Electronic ISBN: 978-3-7091-6244-6

Copyright Year: 2001
DOI: https://doi.org/10.1007/978-3-7091-6244-6_53