Simulation of Semiconductor Processes and Devices 2001

It has been established [1]-[4] that the density gradient (DG) model is the lowest order, in terms of ħ, approximation of the Wigner function approach to including quantum mechanical (QM) effects in carrier transport. In this paper, we report a five-equation PDE system (reduced to three-equation at thermal equilibrium) which preserves the numerical stability of classical drift-diffusion (DD) model, yet faithfully manifests QM corrections. Tunneling through the gate oxide (or barrier region) is modeled by ballistic transport with each type of carrier (electrons or holes) further split into forward and backward moving species and solved for separately. The entire device, including semiconductor and barrier regions, is solved self-consistently. Terminal characteristics, either dc or small signal ac for realistic, multi-dimensional device structures can be simulated using this model. An SOI device example is simulated and the comparison with microscopic (Schrödinger/Poisson) results is excellent. A DG prediction of a dipole in the poly gate near the poly/gate-oxide interface is also confirmed by microscopic simulation. Both I-V and C-V for MOS devices including SOI are shown.

The complexity attained by current microelectronics process technology can hardly be handled with simulators based on the continuum approach. Over the last few years, atomistic Kinetic Monte Carlo has proven to be a new way to tackle the problems that arise as device dimension shrink into the deep submicron regime. We present some encouraging results of exploring the capabilities of this new process modelling approach.

A Monte Carlo dopant diffusion simulation program has been developed which includes charged species, i.e. Fermi-level effects on drift-diffusion and reactions. In order to save computational time, an algorithm that determines variable time steps was improved to account for all the Fermi-level dependent quantities, such as different charge states of point-defects, pairs and complexes, and different diffusivities/reaction rates for them. Simulation of coupled arsenic and boron diffusion for a typical sub-100nm CMOS process has been demonstrated by using this MC program.

A new temperature dependant model for the Ge-B pairing mechanism has been established and implemented in a process simulator. The combination of both lattice strain effects and GeB clustering has been successfully applied to various anneals. The match with experimental SIMS profiles is excellent.

We investigate the role that point defects and interstitial-vacancy pairs have on the Si amorphization process using molecular dynamics techniques. We show that accumulation of interstitial-vacancy pairs in concentrations of 25% and above lead to homogeneous amorphization. We identify very stable defect structures, consisting of the combination of the pair and Si self-interstitials, which form when there is an excess of interstitials or by incomplete interstitial-vacancy recombination in a highly damaged lattice. These defects could survive long enough at room temperature to act as embryos for the formation of extended amorphous zones and/or point defect clusters.

We present a “unified” model for the simulation of boron transient enhanced diffusion in both crystalline and preamorphised structures. The model describes the thermal evolution of a supersaturation of Si interstitial atoms in dynamical equilibrium with all types of extrinsic defects. We show some successful applications of our model to a variety of experimental conditions and give an example of its predictive capabilities at ultra low implantion energies.

A new model is proposed for interstitial and vacancy profiles due to ion implantation. When used in TED simulations, more accurate results are obtained than with the “plus-factor” model. The user is not required to run Monte Carlo simulations nor to explicitly take spatial correlations between interstitials and vacancies into account. The model is formulated in terms of effective Frenkel pair numbers and vertical and lateral shift distances between interstitial and vacancy profiles. It is well suited for 1D/2D/3D process simulation.

The Local Iterative Monte Carlo (LIMO) technique is used to investigate the effect of electron-electron scattering on hot electron effects in Si-MOSFETS with channel length as short as 25 nm. The results indicate that electron-electron scat- tering might be an important source for hot electrons in the next generations of Si-MOSFETs. But the effect decreases if the channel length comes close to 25 nm.

A simplified model for inelastic acoustic phonon scattering of holes in silicon is developed. It consists in approximating both the acoustic phonon energy and the square of the phonon wave vector by lattice—temperature dependent constants. The resulting scattering rate depends only on energy and thus facilitates the search of after—scattering—states during full—band Monte Carlo simulation. The simulation results for the velocity—field characteristics accurately agree with the experimental data at different lattice temperatures, while the population of hot—hole states is significantly enhanced compared to the elastic equipartition approximation. The value of the energy relaxation time to be used in hydrodynamic device simulations is roughly 0.1 ps.

Accurate modeling of impact-ionization is a critical issue for submicron devices. It is well known that models based on the electric field or on the average carrier energy give a rather poor description of the problem. We show that by accounting for the average square energy an accurate analytical description of the distribution function can be given which can then be used to evaluate microscopic models in a macroscopic device simulator. The new model is accurate for both bulk and submicron devices and involves only local quantities.

Ab initio calculations of the electron group velocity for SiO₂ are worked out. The conduction bands are calculated by means of two different techniques: Hartree-Fock (HF) and Density-Functional Theory (DFT). Eight energy bands have been used to calculate the density of states and group velocity for the energies of interest. Two different crystal structures of SiO2, built-up by the same fundamental unit, namely, the SiO₄ tetrahedron, are investigated: they are the a-quartz, and the ß-cristobalite.Fig. 3: GV vs. energy for a-quartz and ß-cristobalite. Solid lines: HF; dashed lines: DFT; circles: parabolic-band approximation.

For the simulation of state-of-the-art devices hydrodynamic and energy transport models allow to account for non-local effects which cannot be captured by the drift-diffusion model. Although these models have been available for several decades, there are still unresolved issues. One of these issues is the occurrence of spurious peaks in the velocity profile which have originally been related to Blotekjær's model. Recent research, however, showed that these peaks are inherent to both Stratton's and Bletekjær's model. We investigate the origin of these peaks by introducing relaxation times, mobilities, and closure relations directly from a coupled Monte Carlo simulator. Although accurate modeling of the relaxation times and mobilities is important, it appears that the origin of the spurious peaks lies in the truncation of the infinite series of moments.

This paper reports the implementation of an elasto-plastic model in advanced stress simulation system within the process simulator IMPACT to predict the mechanical behavior of (poly)crystalline materials used in the microelectronic technologies. The benefits of this new model are a better prediction of the stresses magnitude in elasto-plastic materials, the capability to calculate the location and size of plastic area in silicon substrate and the possibility to analyze very accurately stresses evolution in (un)passivated metal interconnects networks, a serious reliability issue for the IC industry in the recent years.

The understanding of the effect of each physical mechanism driving dopant and point defect diffusion due to Ge leads to a unified formulation of diffusion for the usual dopants in SiGe material. The model calibration is deduced from a critical synthesis of the theoretical and experimental published studies.

We present a simple modeling of boron diffusion in Si_i__X__yGe„C_y by manipulating the strain and the intrinsic carrier concentration. We show that the diffusion of boron is strongly suppressed by a moderate concentration of substitutional C in Si_i__XGe_x. This suppression is due to an under saturation of Si selfinterstitials in the C-rich region. The results obtained from the proposed model are in good agreement with the measured values.

The standard model for simulation of ion implantation into amorphous materials based on the LSS concept of ion penetration [1] remained a reliable work horse for the simulation of ion implantation for a long time, but recent accurate experimental measurements of the implantation profiles in non-crystalline materials (photoresist, amorphous carbon, pre-amorphized silicon) indicated systematic deviations of the measured profiles from the predictions of that standard model. The experimentally measured implantation profiles are usually broader than predictions of simulations based on the amorphous material model, and the relative profile broadening is especially significant for heavy ions at elevated implantation energies. Several physical effects may come in question to explain the broadening of the implantation profiles: experimental uncertainty during the profile analysis, radiation enhanced diffusion during ion implantation, deficiency of the physical model for ion-atomic interaction. The high accuracy of the measurements and the fact that the observed profile broadening is independent of the chemical nature of the target atoms and ions speaks in favour of the last assumption about the physical background of these deviations between the model and experiment.

In dual workfunction gate technologies it can be observed, that p+ poly gates of pMOSFETs tend to lose boron doping. This work presents a model for the transport of Si and B in the TiSi₂/polysilicon bilayer system that can explain the saturation of the B dose loss.

We present a full-3D statistical analysis of line edge roughness (LER) in sub-0.1 μm MOSFETs. The modelling approach for line edges and the parameters used in the analysis take into account the statistical nature of the roughness. The results indicate that intrinsic fluctuations in MOSFETs due to LER become comparable in size to random dopant effects and can seriously inhibit scaling below 50 nm.

As MOSFET devices are aggressively scaled into the deep submicron regime quantum mechanical effects become increasingly important. We compare the recently proposed effective potential formalism with the density gradient approach for first order quantum simulations of sub 0.1μm MOSFETs within a modified drift diffusion framework.

Ultra short channel MOS transistors with high permittivity gate dielectrics suffer from carrier quantum confinement in the channel and from electric field fringing in the dielectric layer. This paper deals with the 2D numerical simulation of the coupling between these two physical mechanisms. We shall demonstrate how they impact the threshold parameters in MOS transistors for metallurgical channel lengths ranging from 5 to 50 nanometers. A special attention has been paid to the control on numerical errors.

Here, for the first time, is described a method for including random variability in device parameters for the benchmarking and optimizing of a decananometer fully-depleted silicon-on-insulator (FDSOI) device. The effect of interdevice and intradevice variability on device performance and design optimization is discussed. These methods are readily extendible to other devices and technologies.

We present results of fully 2D quantum-mechanical (QM) simulations of nanoscale MOSFET’s. The validity of semiclassical transport models are first discussed. Then, QM effects on threshold voltage, subthreshold slope and short-channel performances are addressed. We show that QM effects significantly affect device performances in the nanoscale range.

The geometrical structure of electrodynamics is reviewed following the analogy with gravity. It is found that the vector potentials that represent magnetic fields can be identified as connections. As a consequence, these potentials should be assigned to the links of discretization grids. A ghost field is introduced to guarantee numerical stability in the solution scheme of solving electromagnetic field problems for interconnects and on-chip passives.

We demonstrate the investigations of oxide reliability by means of full-band Monte Carlo simulation. Firstly we discuss the accuracy of the scattering rates particularly for hot hole transport. It is shown that the quantum-yield experiment provides a means to verify the scattering models for hot carriers in MOS system. Secondly, the oxide breakdown is studied by using a substrate hot electron injection technique. Monte Carlo simulations are performed to examine the correlation between the oxide breakdown and the electron energy, and it is shown that the holes generated in the anode electrode play an important role in the oxide degradation: In addition, it is discussed that rigorous hot carrier simulations are necessary to study the reliability issues for ultra-thin oxide films used in advanced CMOS technology.

Kinetic lattice Monte Carlo (KLMC) simulations enable practical atomic-scale modeling of device fabrication processes. In this paper, we discuss implementation of an acceleration algorithm which can provide orders of magnitude speed-up. We apply the result to diffusion and clustering of As at very high doping levels, which are critically important in the formation of ultrashallow junctions.

The evolution of Interstitial (I) type defects in Si and its influence on out of equilibrium I super-saturation level is investigated. Two approaches complementary to Quantum Mechanics Calculations (QMC) are applied: the Kinetic Lattice Monte Carlo (KLMC) and the Non-Lattice Kinetic Monte Carlo (NKMC). Our simulations show that the behaviour of I-super-saturation during a far from equilibrium stage is strongly affected by the correspondent aggregate structural evolution. Therefore, even if KLMC and NKMC are based on the same energetics derived by QMC, they give a different prediction of the super-saturation behaviour.

Experiments of As-doped poly-silicon deposition have shown that under certain process conditions step coverages > 1 can be achieved. We have developed a new model for the simulation of As-doped poly-silicon deposition, which takes into account surface coverage dependent sticking coefficients and surface coverage dependent As incorporation and desorption rates. The additional introduction of Langmuir type time-dependent surface coverage enabled the reproduction of the bottom-up filling of the trenches. In addition the rigorous treatment of the time-dependent surface coverage allows to trace the in-situ doping of the deposited film. Simulation results are shown for poly-Si deposition into 0.1 μm wide and 7 μm deep, high aspect ratio trenches.

The article addresses the use of computational modelling during the equipment design and process development of the Planetary Reactor®, an industrial production scale multiwafer reactor for the MOCVD (Metalorganic Chemical Vapour Deposition) of epitaxial compound semiconductor thin films. MOCVD equipment and process simulation is based on the coupled computation of gas flow field, heat transfer, including rf induction and thermal radiation, and chemical species mass transport and reaction kinetics on 2D axisymmetric and 3D computational domains.

In this paper we present our work on the numerical simulation of ultrarapid heating (with phase-change) of silicon thin-films, which are irradiated with nanosecond-pulsed excimer laser. Our excimer-laserannealing (ELA) modeling capability is based on a standard finite-element CFD software package, which, however, has been modified to accommodate the specific demands of very rapid heating of thin Si films. In that sense, we've abandoned the traditional equilibrium formulation (i.e. enthalpy method), for phase-change computations, and have adopted a new approach that allows superheated solid and undercooled liquid to exist during the various stages of the heating/cooling cycle. Our model has been successfully applied to predict the shape and temporal evolution of temperature profiles in the case of localized melting of silicon thin-films by excimer laser irradiation. Such scenario corresponds to conditions typically encountered in laser-induced lateral crystallization of a-Si films, a process that has recently attracted attention for the formation of high quality poly-Si films.

An accurate and efficient 2D drift-diffusion model for thermal noise simulation based on full—band Monte—Carlo (MC) generated local noise sources is presented. Good agreement of the new model and MC device simulations is found for NMOSFETs, whereas previously developed DD based noise models fail. Verification with experiment is shown for a SiGe HBT.

This work deals with the Monte Carlo method for stationary device simulation, known as the Single-Particle Monte Carlo method. A thorough mathematical analysis of this method clearly identifies the independent, identically distributed random variables of the simulated process. Knowledge of these random variables allows usage of straight-forward estimates of the stochastic error. The presented method of error estimation is applicable to both distributed quantities and integrated quantities such as terminal currents.

We report studies of quantum transport in n+Si-Si02-p Si MetalOxide-Semiconductor (MOS) structures based upon a non-equilibrium tight-binding Green’s function method. As a result, the quasi-bound states at the Si02-p Si interface are found to be lower than those calculated by the conventional Shrödinger-Poisson analysis, since the wavefunctions in this region are coupled with the Bloch functions in the electrodes. It is also found that the leakage current through the oxide consists of not only the intraband tunneling but also the interband tunneling current.

We present a method of modeling quantum confinement effects in MOSFET’s by solving the Schrödinger, Boltzmann, Poisson and current-continuity equations self-consistently.

A stochastic approach to a recently proposed model of terminal current fluctuations is presented. Two kinds of boundary conditions suitable for noise simulations in semiconductor devices are proposed. The properties and the domain of application of the two models are investigated and the conclusions are drawn from numerical experiments.

Inverse modeling of state-of-the-art NMOSFETs is used to investigate electron transport models and in particular to extract the effective velocity of electron injection from source to channel. It is found that this velocity is less than 50% of the maximum possible velocity, i.e. the thermal velocity of electrons in the source. Based on the Landauer formulation, as adapted by Lundstrom to silicon MOSFETs this indicates that modern NMOSFETs are quite far from their ballistic transport limit and therefore their current is still limited by momentum scattering as manifested in the electron mobility. Investigation of mobility in those transistors reveals that it is reduced with channel length, most likely due to Coulomb scattering by the ionized dopant atoms in the source and drain halos that are necessary for well-tempered ultra-short-channel MOSFETs, and possibly remote scattering by the source dopants.

The need for statistical 3D simulations to study intrinsic parameter fluctuations in aggressively scaled MOSFETs introduced by discreteness of charge and atomicity of matter is discussed. We describe a hierarchical implementation of such a 3D `atomistic’ simulation approach, which includes quantum mechanical corrections based on the Density Gradient algorithm. Simulation examples of intrinsic parameter fluctuations associated with random discrete dopants in the active region of the device and in the polysilicon gate, oxide thickness fluctuation within the gate area, and line edge roughness (LER) of the gate are presented. We speculate about the challenges ahead in understanding and accurately simulating the atomistic effects in the next generation of MOSFETs.

Molecular dynamics (MD) simulations have been used to study surface reaction dynamics of Si and Si0₂etching by halogens. To perform classical MD simulations for Si02 etching reaction by halogens (Cl or F), we have constructed new sets of two— and three—body interatomic potential functions based on potential energy data obtained fromab initioquantum mechanical calculations of the electronic states. Etching yields for Si and Si0₂targets are obtained from MD simulations for both beam etching and reactive ion etching (RIE). The obtained yields are in good agreement with experimental observations.

A simulator to calculate etching rates in Si0₂ and Si features in fluorocarbon plasmas has been developed. This simulator links the gas (plasma) phase composition with the etching rate inside features and it is used for predicting aspect ratio dependent phenomena during Si0₂ and Si feature etching.

We present an efficient methodology for setting up MEMS macromodels which are based on a physical device description and lead to tractable mathematical relations for the device operation. Since design and technology parameters are input parameters of the resulting model, our approach is in particular suited for design studies. In addition to the reduction in degrees of freedom and, hence, the reduced simulation time, macromodels can easily be coupled with the electronic circuitry and the entire device can be simulated on system level. The methodology is demonstrated with reference to an electrostatic torsional actuator.

This paper identifies the physical origin and contribution mechanism of substrate induced channel thermal noise in MOSFETs. Resistance of the substrate generates potential fluctuations that in turn produce additive channel noise via the channel depletion capacitor. The additive noise may result in a frequency dependence of the drain current noise due to a pole associated with the Rsub-Cdepi network. Its bias and length dependencies conforms to those of reported excess noise, it thus may exaggerate the amount of the channel thermal noise factor.

We propose a harmonic balance technique for the frequency-domain analysis of MOSFET operation. Our approach is based on the charge-sheet and the non-quasistatic(NQS) MOSFET models in the channel region with the harmonic balance(HB) technique applied to the channel charges. Lateral field effect is considered in the formulation to analyze the short channel MOSFET devices. It is shown that the proposed method renders a computationally efficient tool to analyze the harmonic distortion occurrence in the MOSFET devices due to the nonlinear response of the channel charges.

Drain and gate bias dependent fluctuations of flicker noise of MOSFETs are explained in terms of carrier concentration distributions in a MOSFET channel. A proposed model well describes the increase of the fluctuation in the saturation region of operation. In addition, the gate bias dependence of the fluctuation in the saturation region can also be calculated using the model. Our model predicts that for any gate voltage change, the fluctuation in the saturation region will be 2-2.5 times that in the linear region.

Modem CMOS technologies are becoming increasingly attractive for RF applications.This imposes stringent requirements on compact models used in circuit simulation: not only currents and charges, but also noise, power gain, impedances, and harmonic distortion must be modelled accurately. In this paper several of these issues will be addressed with the help of Philips’ new public-domain compact MOS model, MOS Model 11.

Statistical process fluctuations influence upon device and circuit performance of VLSI with device miniaturization. Thus, robust process, device and circuit designs are needed. This article describes the statistical analysis of MOSFET and interconnect using Technology CAD (TCAD).

Two-dimensional simulation of turn-on characteristics of GaAs MESFETs is performed in which surface states and impact ionization of carriers are considered. It is shown that the gate-lag (or the slow current transient) becomes weaker when including the impact ionization. This is attributed to the fact that the potential profiles along the surface is drastically changed when the surface states capture holes that are generated by impact ionization. The relation between the gate-lag and the so-called kink phenomenon is also discussed.

In a traditional Monte Carlo (MC) model the carrier preserves its band identity during the free flight between scatterings. However, this assumption may not be valid in semiconductor materials with complex unit cell. A new model is needed where the traditional way to use classical equations during the free flight between scattering is replaced by a fully quantum mechanical model of the Bloch carrier dynamics between scattering events. In this work we present such a model along with simulated results of the hole initiated impact ionization coefficients of 4H-SiC.

We present a method of modeling the effective mass, band offset and current in a heterostructure electronic device constructed from two carbon nanotubes of different diameters.

This paper describes the simulations of vertical cleaved-edge overgrowth field effect transistors (CEO-FETs). For the simulation the device simulator SIMBA is used, which is capable to handle complex device geometries as well as several physical models represented by certain sets of partial differential equations. With a multidimensional solution of the Poisson equation the Schrödinger equation is solved either in one or in two dimensions according to the confinement of the electrons in the area where quantum mechanical effects are expected. As a new feature the involvement of a hydrodynamic (HD) transport model is implemented to include non-equilibrium transport phenomena in extremely short channels The experimental results are compared with the simulated data of this device.

In this paper, a new simulation method for two-tone characteristics calculations and the third-order intercept point (0IP3) of heterojunction bipolar transistor (HBT) in large-scale time domain is proposed. Base on waveform relaxation (WR) and monotone iterative (MI) methods, we solve a set of nonlinear ordinary differential equation (ODE) of equivalent circuit. With this approach, the two-tone characteristics in frequency domain for HBTs were directly computed from time domain result with fast Fourier transform (FFT). Simulation results on a realistic HBT are presented to show the accuracy and efficiency of the method.

We study the impact of body-to-body leakage on the performance of partially-depleted silicon-on-insulator (SOI) CMOS technology using TCAD. The body-to-body leakage could be significant because of aggressive technology scaling as shown by process simulations. A fifteen percent degradation in overall delay time is observed by device and mixed-mode circuit simulations. Numerical junction leakage models for accurate body potential modeling are also discussed.

An accurate simulation of integrated circuits consisting of partially depleted (PD) SOI MOSFETs requires a compact MOS model including parasitic phenomena arising from the floating body. Floating body effects include the occurrence of kink in the saturation current and anomalous sub-threshold slope where impact ionization becomes relevant. In addition, the drain current overshoot [1,2] at “switch on” has been reported even in the absence of impact ionization. The drain current overshoot in PD SOI MOSFETs has a significant history dependence: during switching the body potential proportional to the remaining body charge is determined by both carrier generation/recombination in the body and leakage current through the drain/source-to-body junctions

A 2D analytical model for the calculation of the subthreshold slope has been derived for deep-submicron Fully-Depleted SOI MOSFET’s using a Green’s function solution technique. The accuracy of the equations has been verified by a 2D numerical device simulator. It is shown that the analytically derived model for the subthreshold slope is in good agreement with 2D numerical simulation data.

3D-thermal analysis for multifinger devices is developed for partially depleted SOI and Cu interconnects. Using this technique the temperature rise for multifinger devices is at least a factor of 3 higher than predicted by I-D thermal resistance models.Also increase in temperature degrades the performance incrementally.

This paper presents (i) the compact modelling and (ii) the parameter extraction strategy of a 12 V SOI-LDMOS transistor. The LDMOS transistor is characterized by a macro model consisting of the physics based Philips’ MOS Model 9 (MM9) for the channel and MOS Model 31 (MM31) for the drift region. Incorporation of the effect of self-heating during parameter extraction shows that the DC-characteristics can be described consistently and accurately over a wide range of biases, temperatures and device dimensions.

During these last years the width of interconnects in silicon layouts has been reduced to less than 0.25m, the number of metal levels has been increased up to five and the contributions to parasitic capacitances has become dominant. This is why a renewed interest has been triggered on the development of improved extraction methods and recent literature reports a large number of proposals. Capacitance evaluation is a well known and studied problem which requires the solution of the Laplace‘s equation for the electrostatic potential. Many codes have been developed so far, based on finite element or finite difference methods, solving the Laplace’s equation even in a 3D geometry; however they can be seldom applied to real life silicon layouts, since due to the layout geometrical complexity they easily run out of computer resources. The bottleneck is usually circumvented by avoiding the solution of Laplace‘s equation for the entire layout and trying to break the problem into many elementary geometries (sub-problems) or by not considering the real 3D geometry. Those are the so called “quasi 3D” or “2.5D” extractors. In this paper we present an alternative approach for parasitic extraction which solves the Laplace’s equation considering the entire layout without making any geometrical simplification or breaking. It is based on an extended version of the Floating Random Walk algorithm (FRW) [2]. The use of FRW is not novel, but so far it has been limited to the extraction of the total capacitance of the interconnect. Here we show how to use FRW together with the Picard-Carson iterative procedure [1] in order to efficiently get a compact model of an interconnect.

We present an advanced algorithm for an extraction tool that computes inductances of interconnect structures. As already pointed out in [1] the pursued energy concept leads to a 6-fold integral which can also be evaluated by use of the Monte Carlo method. Classical implementation of the Monte Carlo method, where the whole geometry has to be hunted for the associated element loses efficiency. Our approach is applied without time consuming element location for the random point coordinates to compute this integral.

This paper evaluates the dependence of the thermal stresses of aluminum conductors and Si0₂ layers deposited by several different processes using the finite element method(FEM) and topography simulation. The results of topography simulation for four different deposition processes agree well with scanning electron microscopes and subsequent FEM stress simulations are compared with X-ray diffraction measurement data. Simulation results show that the different stresses are created in aluminum lines from different passivation processes. Especially, the stresses of aluminum lines decrease as the encapsulation of aluminum conductors by the oxide layer with void profiles decrease. Through this topography simulation followed by stress simulations for different deposition processes, we can systematically define the failure mechanisms of aluminum lines for various passivation processes.

This paper presents for the first time a new compact Spice-like model of a E2PROM Memory Cells suitable for both DC and transient circuit simulations. This model is based on a new Floating Gate voltage calculation procedure that improves strongly the accuracy of the modeling of the cell. Moreover, this model features many advantages compared to the previous ones: i) it is simple to implement and scale; ii) its computational time is not critical; iii) its parameter extraction procedure is the same of a MOS transistor; iv) it can be easily upgraded to take into account leakage current contributions (SILC).

A practical approach is presented to simulate programming characteristics of Flash memories. The current continuity equation for carriers injected in Si0₂ is embedded in the Poisson equation. The amount of hot electrons at the interface of substrate and Si0₂ is used as the fixed boundary condition for NOR-Flash, whereas spatial distribution of the FN tunnelling probability in Si0₂ is considered for NAND-Flash.

In this paper a figure of merit for evaluating the performance of multi-layer tunnel dielectrics for Flash memory applications is proposed. Further analysis provides an in-depth understanding of the multi-layer stacks and allows to select the most suitable stack for memory application.

We report on the enhanced diffusion characteristics of phosphorus in SEG(selective epitaxial growth)-MOSFETs due to in-diffusion from BPSG (borophosphosilicate glass) layer. Because of structural complexity of SEGMOSFETs, three-dimensional simulation was implemented and our results successfully show that a great deal of impurity in-diffusion from BPSG to silicon layer generates a lot of interstitial. Therefore, the diffusivity of phosphorus is increased dramatically by TED effect, causing the characteristics of SEGMOSFETs is degraded severely.

This paper presents a new and physical modeling approach for neutron SER with excellent accuracy demonstrated on SRAMs fabricated using 0.18µm CMOS technology. The SER contribution of each type of recoil ion and a fast roll-off behavior of neutron SER for high _QCRIT nodes are reported for the first time.

We presented a TCAD-driven total design methodology of FD-SOI MOSFETs, starting from 0.35µm/2.5V shrinking to 0.15µm/1.5V. Jumping from 0.351.1m to 0.15µm, two-phase experiments are performed effectively supported by exhaustive applications of TCAD local models. SOI specific consideration of SOI film thickness variations (oTsoi) and floating-body effects are the key points for the TCAD driven strategy.

This paper presents a simulation evaluation of the performance of 100nm MOSFET devices. Calibration of 2D physical device models against measured 0.13 micron NMOS and PMOS devices forms the basis for a study of different MOSFET device options. The sensitivity of individual design factors is assessed on the device Ion/Ioff performance. The feasibility of achieving the ITRS-2000 specifications is addressed and limitations to the benefit of gate dielectric thickness scaling are identified.

Parameters for a generalized mobility model are extracted from hardware measurements of strained silicon NMOS devices. Only the phone limited mobility parameter was shown to vary with amount of strain in the silicon.Using results of the mobility model fitting, simulations of strained and unstrained silicon devices were performed. These simulations indicated that strained silicon devices should have improved short channel control as well as yield a minimum of 50% improvement in on current.

An analytical MOSFET model is presented that accounts for energy quantization in inversion charge and depletion in the poly gate. The model consistently describes effects on charges, transcapacitances, drain current and transconductances in all regions of operation, depending on five physical device parameters and bias conditions. Compari-son to experimental data is provided and parameter extraction briefly discussed. The model offers manageable equations providing insight into the physical phenomena, thereby supporting analog circuit design practice as well as efficient circuit simulation.

Standard salicided MOSFETs have been repeatedly shown to have inferior ESD protection properties in comparison to salicide-blocked MOSFETs. Standard explanations typically attribute this to shallower current flow and higher peak current density in salicided devices due to the higher conductivity of salicides. In this work we present a numerical analysis of the phenomenon using physical mixed-mode circuit-device simulation. Our results show that the inherent lack of thickness uniformity known to exist in salicide layers can lead to local concentration of current flow and thus local failure of the device.

We present a new method to determine the intrinsic and extrinsic base-emitter and base-collector junction capacitances parameters of bipolar transistors as a function of junction bias. The capacitance specific compact model parameters (p_p, V,y) can be extracted for the intrinsic as well as for extrinsic part. The results can be introduced in recent compact bipolar models.

On the basis of careful selection and calibration of model parameters we performed process and subsequent device simulation on WEB bipolar transistors. As a result, we concluded, that the mechanical stresses may be responsible for the measured varying device DC characteristics with emitter contact window width.

An ensemble Monte Carlo particle model for uni-traveling-carrier (UTC) photodiodes is developed. This model is used to study electron and hole nonequilibrium phenomena and transient response of UTC photodiodes.

We derived a set of quantum mechanical balance equations for a closed electric circuit represented by a closed region Q. These equations were numerically simulated to obtain information about global and local transport properties. In particular we studied a pure quantum wire at low temperature containing only acoustical phonons. We also investigated the influence of a single elastic scatterer present in the quantum wire.

A computational efficient nonlinear iterative method for computing the ground and excited state energies of an electron confined by an InAs quantum dot embedded in GaAs matrix is proposed. We treat the problem with the effective one electronic band Hamiltonian, the energy and position dependent electron effective mass approximation, and the Ben Daniel-Duke boundary conditions. Computational results show that the parabolic band approximation is valid only for the dots with large volume. For excited states the nonparabolic effect has also been found to be stronger than for ground states.

The goal of this paper is to model a SOI pressure sensor based on piezoelectric effect. A PZT film deposited onto a SOI wafer acts like the transistor’s gate. The transducer element is an SOI-MOSFET. The electrical simulation made with ATLAS presents the static characteristics of the device. An analytical model for sensitivities was presented to offer a designing rule. Mechanical simulations with ANSYS establish some mechanical characteristics.

A new three-dimensional Monte Carlo simulator has been developed based on UT-MARLOWE. Unbalanced Octree algorithm was used for spatial decomposition. A new trajectory replication scheme was developed and implemented to enhance computational efficiency. More than two orders of magnitude savings on CPU time have been achieved.

FDTD(finite difference time domain) method is a 3-D full-wave numerical algorithm for solving various electromagnetic phenomena and interaction problems. PML(perfectly matched layer) method is very efficient for absorbing the electromagnetic waves and then for solving unbounded problems. This paper deals with the application of FDTD-PML technique to the solution of wave-structure interaction problems. It is shown that the excited Gaussian pulses were propagated along the multi-level interconnect metal line as the increase of time and the interaction phenomena occurred. The absorbing effectiveness of PML as a function of the time step is also demonstrated.

We present an extensive benchmarking comparison of an ensemble of the most advanced quantum-mechanical (QM) capacitance-voltage (CV) simulators available. Quantitative differences in the accumulation capacitance of p-channel and n-channel devices as large as 20% are found in a systematic comparison. Some of the underlying physics and models that lead to the observed differences are described.

We present numerical investigations of a novel technique for reducing the thermal cycle during lamp-heated rapid-thermal processing (RTP). In our concept the reflective reactor-wall surface is replaced by an electro-optically switchable film, which allows efficient heating and subsequent radiative cooling of processed wafers. Our approach provides an efficient solution to ultrashallow junction requirements for forthcoming CMOS generations.

In this paper, the design of a shared technology simulation repository is described. This system allows the download, archival, and simultaneous translation of equipment recipe and run data into a shared, revision controlled repository, as well as the automated generation of Technology Computer Aided Design (TCAD) input. Based on this system Computer Integrated Manufacturing (CIM) data and integrated circuit layout data can be combined to provide rapid technology optimization, enabling new methods of technology development.

In this paper, we report three-dimensional modeling of the sputter deposition process for ULSI interconnects. The numerical method in this work is based upon the level-set scheme for accurately tracking the moving boundaries of the deposited profiles. A new approach is proposed in an effort to reduce thecalculating CPU time during the calculating step of the deposition rate. Our simulation incorporates three-dimensional direct and/or indirect flux distributions and shadow-effects as well as the dependence of sticking coefficient that affects not only the thickness of film at different position but also the initiation of the creation of a void. In this work, we present several numerical examples for copper deposition process, which include L-shaped trenches and contact holes with different aspect ratios.

We present a new methodology to generate a two-transistor MACRO model of a SSI Flash cell based on a practical cell partitioning and a systematic and rigorous parameter extraction scheme. Through extensive TCAD simulation and precise measurement techniques, BSIM3 parameters of the individual transistors and coupling ratios of the cell were extracted, yielding a SPICE-compatible MACRO model for a three-poly split-gate Flash cell.

In the present work we have conducted theoretical calculations of the transient response of SI GaAs radiation detectors. The detector under consideration is a typical reverse biased Schottky diode of high purity undopped GaAs or compensated material. The electrical characteristics of the “dark” equilibrium state, derived by the Poisson and continuity equations, indicate that in the compensated detector is established a wider active region [1]. We considered that the detector operates in pulse or current mode. In pulse mode, a single charged particle (i.e. proton, a—particle) incidents the detector on either the Schottky or ohmic contact, whereas in current mode the detector is irradiated by a short-lived particle beam.

Copper and low dielctric constantant (k) materials are poised to become the dominant interconnect scheme for integrated circuits for the future because of the low resistance and capacitance that they offer which can improve circuit performance by more than 30% over conventional interconnect schemes. This paper addresses the thermomechanical stresses in the Cu/Low k interconnect scheme through numerical simulation and identifies the locations of maximum stress in the structure with view to providing information on the impact that different dielectric materials have on the stress distribution in the interfaces between metals and dielectric layers.

We present a robust, fast, and accurate method for prediction of threshold voltage fluctuations induced by random placement of dopants in the MOSFETs. It is used to accurately predict the threshold voltage fluctuation for an analog transistor design. The method allows easy coupling to a process and device simulation framework, and, hence, evaluation of dopant induced threshold voltage fluctuation at the transistor design stage. The methodology is also used to compare the threshold voltage fluctuation in ultra-short channel devices having different profile architectures.

This paper describes a common software platform that allows users to combine multi-scale physical simulations in the form of agents. To demonstrate the benefit of combing multiple simulations, hydrogen desorption at the interface of gate oxide and Si-substrate due to hot electrons in a deep sub-micron device is analysed by coupling device and lattice Monte Carlo simulation. Deposition profiles on a large-scale wafer are studied by using particle method hybridised with continuum simulation. The desorption probability of hydrogen and the coverage of deposition layer are shown to be strongly dependent on the position under the gate and on the wafer respectively.

Silicon avalanche photodiodes operated above breakdown, in Geiger mode, can be sensitive enough to allow single photon detection. An inherent limit to GMAPD sensitivity is the noise caused by thermally generated carriers. This noise manifests itself as extraneous counts in the absence of light and is termed the dark count. The presence of the dark count in GM-APD detectors reduces the signal to noise ratio and increases the integration times that are necessary for photon detection. A 1-Dimensional model of the dark count in GM-APD detectors was developed and dark count was found to depend predominantly on carrier generation through Shockley-Read-Hall (SRH) generation centres and secondly on thermal diffusion of minority carriers in the bulk. Simulations performed show that minimisation of the dark count is limited by bulk diffusion of minority carriers. The reduction of process induced damage minimises the dark count and allows theoretically minimum dark counts to be achieved.

A hybrid Schottky barrier tunneling transistor is assessed by device simulations and measurements. n+ regions are formed in Schottky contact regions of source and drain. The unified simulation technique is used to simulate ohmic and Schottky contact natures. The devices are fabricated by utilizing the conventional extension process. It is shown that potential modulation by n+ regions reduces drain leakage current and enhance the tunneling probability at the source contract.

This work deals with the simulation of two-dimensional impurity diffusion in CMOS silicon devices. The Reverse Modeling method was used to determine the diffusion coefficient (D _I ) surface recombination rate of defects (K ₁ ) and the characteristics of the injecting source. Analysis showed similarity between D _I in 2-D system compared with the value obtained from non-patterned samples. The results for D _I and K ₁ are very well described by the Arrhenius expressions. D was found to be related to the substrate type e.g. EPI or CZ. The values of K ₁ related to the interface type, oxidizing or non-oxidizing (Si0₂ or Si₃N₄).

Advanced n-MOSFET structure with featured size of 90nm channel length is simulated using a newly developed Quantum Mechanical (QM) correction model based on Modified Airy Function (MAF) method. The influences of Quantum Mechanical Effects (QMEs) on the carrier distribution in the whole channel is included and the output as well as the transfer characteristics are compared with and without QM correction. It is demonstrated that QMEs result in more severe short channel effects such as threshold voltage roll off and DIBL effects.

A new threshold voltage (Vth) model has been developed for the pocket-implant technology. The model extracts the threshold condition from the entire mobile charge concentration in the channel with only two parameters; the maximum doping concentration (N _su h _p ) of the pocket profile and the penetration length (L _o ) into the channel. The model reproduces the measured V_th vs. gate-length (L_gate) characteristics with an average error of a few mV under any bias conditions.

The high current characteristics of an ESD protection structure fabricated in a smart power technology is calculated by the use of electrothermal device simulation. We find reasonable agreement with experimental results after careful calibration of the technology-dependent transport parameters. The still existing differences between measurement and simulation results are discussed, together with some conclusions for the application of our simulation strategy in future.

Low-frequency noise of the MOSFET was simulated using the transfer impedance method together with a 2-D device simulator. In the simulation, various generation-recombination (GR) components such as SRH recombination centers and surface traps of various lifetimes are taken into account. It is shown that lifetimes of traps determine the characteristics of low-frequency noise. Also is shown that the GR process not only at the surface but also in the bulk may be responsible for the low-frequency noise.

A fast simulation tool for electron beam lithography is applied for the prediction of energy deposition and the resist profile of high resolution patterns. For the exposure part, an analytical solution based on the Boltzmann transport equation is used. The energy deposition has been combined with analytical functions describing the resist development and complete simulation of dense layouts in the sub-quarter-micron range has been carried out. The simulation results have been compared with experimental ones and found in very good agreement.

In todays high voltage processes the optimization of process and layout design is a key point to get competitive products. Effects like punch-through between two junctions and breakdown near the surface of the wells make it necessary to analyze complex three-dimensional process steps by simulators which give accurate answers to the process engineers.

The introduction of alternative gate dielectrics into advanced CMOS devices has quite an impact on the device performance. In this work transient analyses of this type of devices are made for the first time. The analyses are made by mixed-mode simulation of a ring oscillator. It is shown that this method allows a deeper insight into the device properties than mere static analysis. Utilizing the results, first design rules for advanced CMOS devices are extracted.

We present simulations of a recently published SRAM memory gain cell consisting of two transistors and one MOS capacitor, representing an alternative to conventional six transistor SRAMs. Inverse modeling is used to fit a given device characteristic to measurement data. To account for de-charging due to tunneling, we use a simple, non-local tunneling model and calibrate it with data from literature. By optimization, we find values for the contact voltages in the off-region at which the retention time is a maximum.

The optimization of computationally expensive objective functions requires approximations that preserve the global properties of the function under investigation. The RSM approach of using multivariate polynomials of degree two can only preserve the local properties of a given function and is therefore not well-suited for global optimization tasks. In this paper we discuss generalized Bernstein polynomials that provide faithful approximations by converging uniformly to the given function. Apart from being useful for optimization tasks, they can also be used for solving design for manufacturability problems.

For the simulation of etching and deposition processes the cellular method is very popular, because of its high robustness compared to alternative methods like the level set or the moving boundary approach. We present a method for the simulation of topography processes based on the cellular method that overcomes the problem of loss of information when using a cellular based simulator in combination with simulators using polygonal data representations. Additionally the new method allows to increase the resolution of the topography simulator without a significantly higher memory requirement.

We present a novel methodology for characterization of sub-quartermicron CMOS technologies. It involves process calibration, device calibration employing two-dimensional device simulation and automated Technology Computer Aided Design (TCAD) optimization, and, finally, transient mixed-mode device/circuit simulation. The proposed methodology was tested on 0.25 εm technology and applied to 0.13 εm technology in order to estimate ring oscillator speed. The simulation results show an excellent agreement with available experimental data.

We give a summary of the state-of-the-art of heterostructure RF-device simulators for industrial application based on III-V compound semiconductors and compare critical modeling issues. Results from two-dimensional hydrodynamic simulations of High Electron Mobility Transistors (HEMTs) and Heterojunction Bipolar Transistors (HBTs) with MINIMOS-NT are presented. Simulation examples are chosen to demonstrate technologically important issues which can be addressed and solved by III-V device simulation. A summary of remaining modeling issues is provided

In this paper, we present a model that describes the initial generation of charge due to the loss of kinetic energy of an ion penetrating into a semiconductor device. 2D simulations of a reverse biased power diode visualize the evolution of carrier densities and electric fields in the interior of the device as initiated by the ion. For the case of irradiation with 17MeV '2C ions, the simulations agree well with recent experimental findings.

Knowledge of the solubility rate dependence on exposure dose S(D) gives possibility to estimate the values of the radiation efficiency, sensitivity and contrast characteristics in electron and ion lithography. The idea for interconnection between the sensitivity and the contrast characteristics for an arbitrary combination of resist and developer (i.e. at a given molecular weight, resist density and radiation efficiency of the charged particles) is a base for the sensitivity optimisation in order to achieve the required contrast at chosen development conditions. The contrast parameter value y_s (related to the traditionally used contrast parameter y_d) is determined by the slope of the dependence S(D) of the resist solubility rate Son the average exposure dose D.