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Published in: Electrical Engineering 5/2023

07-06-2023 | Original Paper

Analysis and experimental tests of a solid-state fault current limiter

Authors: Alexandre Bitencourt, Cauê Nogueira, Gabriel dos Santos, D. H. N. Dias, B. W. França, F. Sass, G. G. Sotelo

Published in: Electrical Engineering | Issue 5/2023

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Abstract

The increase in distribution power demand and distributed generation may lead to a rise in power substation fault current levels. One possible solution to this problem is the use of a solid-state fault current limiter (SS-FCL). In this context, this paper proposes the concept of a bridge-type solid-state device switching an air-core reactor as an SS-FCL topology. The overvoltage protection system details are presented, along with an explanation of the fault detection algorithm control's principle. An experimental setup is designed to evaluate various events in addition to the short-circuit, such as load-steps, harmonic loads, motor startups, and transformer’s inrush. Fault current is detected within one millisecond, with a total reduction of 42%. The overvoltage protection system clamped the peak voltage across the semiconductor switch and kept the dV/dt below the maximum stipulated. The load input tests showed a proper limiting operation and provided that the device is within the parameterization range.

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Literature
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17.
go back to reference Sarmiento HG (2007) “A fault current limiter based on an LC resonant circuit: design, scale model and prototype field tests”. In: 2007 iREP symposium—bulk power system dynamics and control—VII. revitalizing operational reliability, Charleston, SC, USA, pp. 1–5. https://doi.org/10.1109/IREP.2007.4410570 Sarmiento HG (2007) “A fault current limiter based on an LC resonant circuit: design, scale model and prototype field tests”. In: 2007 iREP symposium—bulk power system dynamics and control—VII. revitalizing operational reliability, Charleston, SC, USA, pp. 1–5. https://​doi.​org/​10.​1109/​IREP.​2007.​4410570
Metadata
Title
Analysis and experimental tests of a solid-state fault current limiter
Authors
Alexandre Bitencourt
Cauê Nogueira
Gabriel dos Santos
D. H. N. Dias
B. W. França
F. Sass
G. G. Sotelo
Publication date
07-06-2023
Publisher
Springer Berlin Heidelberg
Published in
Electrical Engineering / Issue 5/2023
Print ISSN: 0948-7921
Electronic ISSN: 1432-0487
DOI
https://doi.org/10.1007/s00202-023-01880-w

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