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1999 | OriginalPaper | Chapter

Formal Synthesis at the Algorithmic Level

Authors : Christian Blumenröhr, Viktor Sabelfeld

Published in: Correct Hardware Design and Verification Methods

Publisher: Springer Berlin Heidelberg

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In our terminology, the term “formal synthesis” stands for a synthesis process where the implementation is derived from the specification by applying elementary mathematical rules within a theorem prover. As a result the implementation is guaranteed to be correct. In this paper we introduce a new methodology to formally derive register-transfer structures from descriptions at the algorithmic level via program transformations. Some experimental results at the end of the paper show how the run-time complexity of the synthesis process in our approach could be.

Metadata
Title
Formal Synthesis at the Algorithmic Level
Authors
Christian Blumenröhr
Viktor Sabelfeld
Copyright Year
1999
Publisher
Springer Berlin Heidelberg
DOI
https://doi.org/10.1007/3-540-48153-2_15

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