1999 | OriginalPaper | Buchkapitel
Formal Synthesis at the Algorithmic Level
verfasst von : Christian Blumenröhr, Viktor Sabelfeld
Erschienen in: Correct Hardware Design and Verification Methods
Verlag: Springer Berlin Heidelberg
Enthalten in: Professional Book Archive
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In our terminology, the term “formal synthesis” stands for a synthesis process where the implementation is derived from the specification by applying elementary mathematical rules within a theorem prover. As a result the implementation is guaranteed to be correct. In this paper we introduce a new methodology to formally derive register-transfer structures from descriptions at the algorithmic level via program transformations. Some experimental results at the end of the paper show how the run-time complexity of the synthesis process in our approach could be.