Top

The Journal of Supercomputing

Published in:

08-09-2022

High-level power estimation techniques in embedded systems hardware: an overview

Authors: Majdi Richa, Jean-Christophe Prévotet, Mickaël Dardaillon, Mohamad Mroué, Abed Ellatif Samhat

Published in: The Journal of Supercomputing | Issue 4/2023

Activate our intelligent search to find suitable subject content or patents.

search-config

AI-assisted search

Off

Abstract

Power optimization has become a major concern for most digital hardware designers, particularly in early design phases and especially in limited power budget systems (battery-operated hand-held devices, electro-optical pluggable modules, IoT and green energy systems, etc.). Subsequently, early power consumption estimation at design time is crucial for power optimization. The aim of this paper is to present an overview of high-level power estimation techniques currently available along with a comprehensive comparison between different methodologies and their applications on estimated models. When high speed and high performance are key features of a specific embedded system, increase in energy consumption becomes the main hurdle to be tackled while keeping speed/performance v/s power consumption trade-off at a minimum. This paper provides designers, interested in power consumption modeling, with knowledge on how to select best power estimation techniques applied to designated target models.

previous article A privacy-preserving multidimensional data aggregation scheme with secure query processing for smart grid

next article Faulty processor identification for a multiprocessor system under the Malek model using an improved binary bat algorithm

Dont have a licence yet? Then find out more about our products and how to get one now:

Springer Professional "Wirtschaft"

Online-Abonnement

Mit Springer Professional "Wirtschaft" erhalten Sie Zugriff auf:

über 67.000 Bücher
über 340 Zeitschriften

aus folgenden Fachgebieten:

Bauwesen + Immobilien
Business IT + Informatik
Finance + Banking
Management + Führung
Marketing + Vertrieb
Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

inform now

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

über 67.000 Bücher
über 390 Zeitschriften

aus folgenden Fachgebieten:

Automobil + Motoren
Bauwesen + Immobilien
Business IT + Informatik
Elektrotechnik + Elektronik
Energie + Nachhaltigkeit
Maschinenbau + Werkstoffe

Jetzt Wissensvorsprung sichern!

inform now

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

über 102.000 Bücher
über 537 Zeitschriften

aus folgenden Fachgebieten:

Automobil + Motoren
Bauwesen + Immobilien
Business IT + Informatik
Elektrotechnik + Elektronik
Energie + Nachhaltigkeit
Finance + Banking
Management + Führung
Marketing + Vertrieb
Maschinenbau + Werkstoffe
Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

inform now

Afifi SM, Verdier F, Belleudy C (2014) Power estimation method based on real measurements for processor-based designs on FPGA. Proceedings - 2014 International Conference on Computational Science and Computational Intelligence, CSCI 2014. 2:260–263

Ahuja S, Mathaikutty DA, Singh G, Stetzer J, Shukla SK, Dingankar A (2009) Power estimation methodology for a high-level synthesis framework. Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009 pp. 541–546. https://doi.org/10.1109/ISQED.2009.4810352

Ananthanarayana T, Lopez S, Lukowiak M (2017) Power analysis of HLS-designed customized instruction set architectures. Proceedings - 2017 IEEE 31st International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2017 pp. 207–212. https://doi.org/10.1109/IPDPSW.2017.59

Arpinen T, Salminen E, Hämäläinen TD, Hännikäinen M (2012) MARTE profile extension for modeling dynamic power management of embedded systems. J Syst Archit 58(5):209–219. https://doi.org/10.1016/j.sysarc.2011.01.003CrossRef

Carballo PP, Espino O, Neris R, Hernández-Fernández P, Szydzik TM, Núñez A (2013) Scalable video coding deblocking filter FPGA and ASIC implementation using high-level synthesis methodology. Proceedings - 16th Euromicro Conference on Digital System Design, DSD 2013 pp. 415–422. https://doi.org/10.1109/DSD.2013.52

Chalil A (2018) Implementation of power estimation methodology for intellectual property at SoC level. Proceedings of the 2nd International Conference on Communication and Electronics Systems, ICCES 2017 2018-January, 1010–1013 . https://doi.org/10.1109/CESYS.2017.8321234

Chandoke N, Sharma AK (2016) A novel approach to estimate power consumption using SystemC transaction level modelling. 12th IEEE International Conference Electronics, Energy, Environment, Communication, Computer, Control: (E3-C3), INDICON 2015 pp. 1–6. https://doi.org/10.1109/INDICON.2015.7443519

Cong J, Liu B, Neuendorffer S, Noguera J, Vissers K, Zhang Z (2011) High-level synthesis for FPGAs: From prototyping to deployment. IEEE Trans Comput Aided Des Integr Circ Syst 30(4):473–491. https://doi.org/10.1109/TCAD.2011.2110592CrossRef

Degalahal V, Tuan T (2005) Methodology for high level estimation of FPGA power consumption. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 1:657–660. https://doi.org/10.1145/1120725.1120986

10.

Durrani YA, Abril A, Riesgo T (2007) Efficient power macromodeling technique for IP-based digital system. Proceedings - IEEE International Symposium on Circuits and Systems pp. 1145–1148 . https://doi.org/10.1109/ISCAS.2007.378252

11.

El-dib D, El-dib DA, Alkabani Y, El-moursy M, Shawkey HH (2016) Automated FPGA Power Characterization Methodology. International Journal of Electrical and Computer Sciences IJECS-IJENS 16(2)

12.

Gallo C (2011) Artificial neural networks. Artificial Neural Networks (January 2015), 1–426. https://doi.org/10.4324/9781315154282-3

13.

Greaves D, Yasin M (2014) TLM POWER3: Power estimation methodology for SystemC TLM 2.0. Lecture Notes in Electrical Engineering 265 LNEE, 53–68 . https://doi.org/10.1007/978-3-319-01418-0-4

14.

Irfan M, Masud S, Pasha MA (2018) Development of a High Level Power Estimation Framework for Multicore Processors. In: Proceedings of 2018 2nd IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference, IMCEC 2018 . https://doi.org/10.1109/IMCEC.2018.8469473

15.

Jordane L, Prévotet JC, Hélard M (2016) Fast Power and Energy Efficiency Analysis of FPGA-based Wireless Base-band Processing. HIP3ES, Prague, Czech Republic . arXiv:1601.00834

16.

Knodtel J, Schwabe W, Lieske T, Reichenbach M, Fey D (2018) A Novel Methodology for valuating the Energy Consumption of IP Blocks in System-Level Designs. 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) pp. 46–53. https://doi.org/10.1109/PATMOS.2018.8464149. https://ieeexplore.ieee.org/document/8464149/

17.

Kumar AKA, Gerstlauer A (2019) Learning-based CPU power modeling. 2019 ACM/IEEE 1st Workshop on Machine Learning for CAD, MLCAD 2019. https://doi.org/10.1109/MLCAD48534.2019.9142100

18.

Lakshminarayana A, Ahuja S, Shukla S (2011) High Level Power Estimation Models for FPGAs. 2011 IEEE Computer Society Annual Symposium on VLSI pp. 7–12. https://doi.org/10.1109/ISVLSI.2011.79

19.

Lee D, Gerstlauer A (2018) Learning-based, fine-grain power modeling of system-level hardware IPs. ACM Trans Des Autom Electr Syst 23(3):1–25. https://doi.org/10.1145/3177865CrossRef

20.

Lee D, Kim T, Han K, Hoskote Y, John LK, Gerstlauer A (2015) Learning-Based Power Modelling of System-Level Black-Box IPs. IEEE/ACM International Conference on Computer-Aided Design pp. 847–853

21.

Lee HG, Nam S, Chang N (2003) Cycle-accurate energy measurement and high-level energy characterization of FPGAs. Proceedings - International Symposium on Quality Electronic Design, ISQED 2003-Janua, 267–272 . https://doi.org/10.1109/ISQED.2003.1194744

22.

Li F, He L (2005) Power modeling and characteristics of field programmable gate arrays. IEEE Trans Comput Aided Des Integr Circ Syst 24:1–13

23.

Liang H, Chen YC, Luo T, Zhang W, Li H, He B (2015) Hierarchical Library Based Power Estimator for Versatile FPGAs. Proceedings - IEEE 9th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2015 pp. 25–32. https://doi.org/10.1109/MCSoC.2015.44

24.

Lin Z, Zhao J, Sinha S, Zhang W (2020) HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis. In: 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 574–580. IEEE. https://doi.org/10.1109/ASP-DAC47756.2020.9045442. https://ieeexplore-ieee-org.rproxy.insa-rennes.fr/stamp/stamp.jsp?tp= &arnumber=9045442

25.

Ludewig R, Ortiz AG, Murgan T, Glesner M (2002) Power estimation based on transition activity analysis with an architecture precise rapid prototyping system. Proceedings of the International Workshop on Rapid System Prototyping 2002-January, 138–143 . https://doi.org/10.1109/IWRSP.2002.1029749

26.

Marjanovic J (2018) Low vs high level programming for FPGA. Proceedings of the 7th International Beam Instrumentation Conference, IBIC 2018 pp. 527–533 . https://doi.org/10.18429/JACoW-IBIC2018-thoa01. https://accelconf.web.cern.ch/ibic2018/papers/thoa01.pdf

27.

Moy M, Helmstetter C, Bouhadiba T, Maraninchi F (2016) Modeling Power Consumption and Temperature in TLM Models To cite this version : HAL Id : hal-01339441 Modeling Power Consumption and Temperature in TLM Models. Leibniz Transactions on Embedded Systems 3(3), 0–29

28.

Nasser Y, Lorandel J (2020) RTL to transistor level power modelling and estimation techniques for FPGA and ASIC : a survey. IEEE TCAD Circ Syst 40(3):479–493

29.

Nasser Y, Prévotet JC, Hélard M (2018) Power modeling on FPGA: A neural model for RT-level power estimation. 2018 ACM International Conference on Computing Frontiers, CF 2018 - Proceedings (1), 309–313 . https://doi.org/10.1145/3203217.3204462

30.

Nasser Y, Sau C, Prévotet JC, Fanni T, Palumbo F, Hélard M, Raffo L (2019) Neu Pow: Artificial Neural Networks for Power and Behavioral Modeling of Arithmetic Components in 45nm ASICs Technology. ACM International Conference on Computing Frontiers 2019, CF 2019 - Proceedings pp. 183–189 . https://doi.org/10.1145/3310273.3322820

31.

Nasser Y, Sau C, Prévotet JC, Fanni T, Palumbo F, Hélard M, Raffo L (2020) NeuPow: a CAD methodology for high-level power estimation based on machine learning. ACM Trans Des Autom Electr Syst 25(5):1–29. https://doi.org/10.1145/3388141CrossRef

32.

Orcioni S, Giammarini M, Scavongelli C, Vece GB, Conti M (2016) Energy estimation in SystemC with Powersim. Integr VLSI J 55:118–128. https://doi.org/10.1016/j.vlsi.2016.04.006CrossRef

33.

Paniego JM, Libutti L, Puig MP, Chichizola F, De Giusti L, Naiouf M, De Giusti A (2020) Unified power modeling design for various raspberry pi generations analyzing different statistical methods. Commun Comput Inform Sci. https://doi.org/10.1007/978-3-030-48325-8-4CrossRef

34.

Perleberg MR, Goebel JW, Melo MS, Afonso V, Agostini LV, Zatt B, Porto M (2018) ASIC power-estimation accuracy evaluation: A case study using video-coding architectures. 9th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2018 - Proceedings pp. 1–4 . https://doi.org/10.1109/LASCAS.2018.8399919

35.

Piscitelli R, Pimentel A (2012) A high-level power model for MPSoC on FPGA. IEEE Comput Archit Lett 11(1):13–16. https://doi.org/10.1109/L-CA.2011.24CrossRef

36.

Reimer A, Schulz A, Nebel W (2006) Modelling macromodules for high-level dynamic power estimation of FPGA-based digital designs. Proc Int Symp Low Power Electr Des 2006:151–154. https://doi.org/10.1145/1165573.1165609CrossRef

37.

Richa M, Prévotet JC, Dardaillon M, Mroué M, Samhat AE (2021) An Automated and Centralized Data Generation and Acquisition System. In: 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 1–4 . https://doi.org/10.1109/ICECS53924.2021.9665490. https://ieeexplore.ieee.org/document/9665490/

38.

Rogers-Vallée M, Cantin MA, Moss L, Bois G (2010) IP characterization methodology for fast and accurate power consumption estimation at transactional level model. Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors pp. 534–541 . https://doi.org/10.1109/ICCD.2010.5647622

39.

Shorin D, Zimmermann A (2014) Formal description of an approach for power consumption estimation of embedded systems. In: 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014 . https://doi.org/10.1109/PATMOS.2014.6951890

40.

Streubühr M, Rosales R, Hasholzner R, Haubelt C, Teich, J (2011) ESL power and performance estimation for heterogeneous MPSOCS using SystemC. In: Forum on Specification and Design Languages

41.

Varma A, Debes E, Kozintsev I, Klein P, Jacob B (2008) Accurate and fast system-level power modeling: An XScale-based case study. ACM Trans Embed Comput Syst 7(3):1–20. https://doi.org/10.1145/1347375.1347378CrossRef

42.

Wang L, Wang X, Wang T, Yang Q (2012) High-level power estimation model for SOC with FPGA prototyping. Proceedings - 4th International Conference on Computational Intelligence and Communication Networks, CICN 2012 pp. 491–495 . https://doi.org/10.1109/CICN.2012.124

43.

Zhai J, Bai C, Zhu B, Cai Y, Zhou Q, Yu B (2022) McPAT-Calib: A RISC-V BOOM microarchitecture power modeling framework. IEEE Trans Comput Aided Des Integr Circ Syst. https://doi.org/10.1109/tcad.2022.3169464CrossRef

Title: High-level power estimation techniques in embedded systems hardware: an overview
Authors: Majdi Richa
Jean-Christophe Prévotet
Mickaël Dardaillon
Mohamad Mroué
Abed Ellatif Samhat
Publication date: 08-09-2022
Publisher: Springer US
Published in: The Journal of Supercomputing / Issue 4/2023
Print ISSN: 0920-8542
Electronic ISSN: 1573-0484
DOI: https://doi.org/10.1007/s11227-022-04798-5

Springer Professional

Abstract

Please log in to get access to your license.

Dont have a licence yet? Then find out more about our products and how to get one now:

Springer Professional "Wirtschaft"

Springer Professional "Technik"

Springer Professional "Wirtschaft+Technik"

Other articles of this Issue 4/2023

Three edge-disjoint Hamiltonian cycles in crossed cubes with applications to fault-tolerant data broadcasting

Dimension-aware under spatiotemporal constraints: an efficient privacy-preserving framework with peak density clustering

Evaluation of e-learners’ concentration using recurrent neural networks

A privacy-preserving multidimensional data aggregation scheme with secure query processing for smart grid

Faulty processor identification for a multiprocessor system under the Malek model using an improved binary bat algorithm

Archimedes optimizer-based fast and robust fuzzy clustering for noisy image segmentation

Premium Partner