Image Hashing Based on SHA-3 Implemented on FPGA

In recent years, in our digital world, images play an essential part in everyday's communication or in remote sensing, so techniques to validate the integrity and correctness of the transmission are required. The most popular technique is hashing. In this article, we focus on the SHA-3 (Keccak) algorithm for hashing images. We use the images of dimensions 256 × 256 pixel for our implementations based on the VHDL. Our implementations were performed on the Intel Arria 10 GX field-programmable gate array (FPGA) and Nios II processor. Also, experimental results such as entropy, number of pixel changing rate (NPCR), and unified averaged changed intensity (UACI), metrics show that the SHA-3 (Keccak) algorithm is reliable, secure and has a high application potential for hashing images. The proposed design aims to improve the criteria of efficiency, security, and throughput. Finally, we augmented our design using the Floating Point Hardware 2 (FPH2) IP Block and we compared the results of our research with other existing architectures.