Nonlinear Parity Circuits and their Cryptographic Applications

This paper proposes a new family of nonlinear cryptographic functions called parity circuits. These parity circuits compute a one-to-one Boolean function, and they can be applied to symmetric block ciphers. In this paper, parity circuits are first defined. Next, these circuits are proven to satisfy some of the properties required in cryptography; involution, nonlinearity, the probability of bit complementation, avalanche effect, equivalent keys and computational efficiency. Finally, the speed of parity circuits implemented using the current hardware technology is estimated to show they can achieve 160 Mbps with a 64-bit block size, 8 rounds, and 3.2 K gates.