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Published in: Journal of Electronic Testing 5/2019

20-11-2019

Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness

Authors: Arjun Singh Chauhan, Vineet Sahula, Atanendu Sekhar Mandal

Published in: Journal of Electronic Testing | Issue 5/2019

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Abstract

The physical unclonable functions (PUFs) are used to provide software as well as hardware security for the cyber-physical systems. They have been used for performing significant cryptography tasks such as generating keys, device authentication, securing against IP piracy, and to produce the root of trust as well. However, they lack in reliability metric. We present a novel approach for improving the reliability as well as the uniqueness of the field programmable gated arrays (FPGAs) based ring oscillator PUF and derive a random number, consuming very small area (< 1%) concerning look-up tables (LUTs). We use frequency profiling method for distributing frequency variations in ring oscillators (RO), spatially placed all across the FPGA floor. We are able to spot suitable locations for RO mapping, which leads to enhanced ROPUF reliability. We have evaluated the proposed methodology on Xilinx -7 series FPGAs and tested the robustness against environmental variations, e.g. temperature and supply voltage variations, simultaneously. The proposed approach achieves significant improvement (i) in uniqueness value upto 49.90%, within 0.1% of the theoretical value (ii) in the reliability value upto 99.70%, which signifies that less than 1 bit flipping has been observed on average, and (iii) in randomness, signified by passing NIST test suite. The response generated through the ROPUF passes all the applicable relevant tests of NIST uniformity statistical test suite.

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Literature
1.
go back to reference Anandakumar NN, Hashmi MS, Sanadhya SK (2017) Compact implementations of FPGA-based PUFs with enhanced performance. In: Proceedings of 2017 30th international conference on VLSI design and 2017 16th international conference on embedded systems (VLSID), pp 161–166 Anandakumar NN, Hashmi MS, Sanadhya SK (2017) Compact implementations of FPGA-based PUFs with enhanced performance. In: Proceedings of 2017 30th international conference on VLSI design and 2017 16th international conference on embedded systems (VLSID), pp 161–166
2.
go back to reference Arthur D, Vassilvitskii S (2007) K-means++: the advantages of careful seeding. In: Proceedings of the eighteenth annual ACM-SIAM symposium on discrete algorithms, SODA ’07. Society for Industrial and Applied Mathematics, Philadelphia, pp 1027–1035 Arthur D, Vassilvitskii S (2007) K-means++: the advantages of careful seeding. In: Proceedings of the eighteenth annual ACM-SIAM symposium on discrete algorithms, SODA ’07. Society for Industrial and Applied Mathematics, Philadelphia, pp 1027–1035
3.
go back to reference Bakiri M, Guyeux C, Couchot JF, Oudjida AK (2018) Survey on hardware implementation of random number generators on FPGA: Theory and experimental analyses. Computer Science Review 27:135–153MathSciNetCrossRef Bakiri M, Guyeux C, Couchot JF, Oudjida AK (2018) Survey on hardware implementation of random number generators on FPGA: Theory and experimental analyses. Computer Science Review 27:135–153MathSciNetCrossRef
4.
go back to reference Barbareschi M, Natale GD, Bruguier F, Benoit P, Torres L (2016) Ring oscillators analysis for security purposes in Spartan-6 FPGAs. Microprocess Microsyst 47:3–10CrossRef Barbareschi M, Natale GD, Bruguier F, Benoit P, Torres L (2016) Ring oscillators analysis for security purposes in Spartan-6 FPGAs. Microprocess Microsyst 47:3–10CrossRef
5.
go back to reference Bassham LE III, Rukhin AL, Soto J, Nechvatal JR, Smid ME, Barker EB, Leigh SD, Levenson M, Vangel M, Banks DL, Heckert NA, Dray JF, Vo S (2010) Sp 800-22 rev. 1a. A statistical test suite for random and pseudorandom number generators for cryptographic applications. Tech. rep., NIST, Gaithersburg, MD, United States Bassham LE III, Rukhin AL, Soto J, Nechvatal JR, Smid ME, Barker EB, Leigh SD, Levenson M, Vangel M, Banks DL, Heckert NA, Dray JF, Vo S (2010) Sp 800-22 rev. 1a. A statistical test suite for random and pseudorandom number generators for cryptographic applications. Tech. rep., NIST, Gaithersburg, MD, United States
6.
go back to reference Bolotnyy L, Robins G (2007) Physically unclonable function-based security and privacy in RFID systems. In: Proceedings of fifth annual IEEE international conference on pervasive computing and communications (percom’07), pp 211–220 Bolotnyy L, Robins G (2007) Physically unclonable function-based security and privacy in RFID systems. In: Proceedings of fifth annual IEEE international conference on pervasive computing and communications (percom’07), pp 211–220
7.
go back to reference Böhm C., Hofer M, Pribyl W (2011) A microcontroller SRAM-PUF. In: Proceedings of 2011 5th international conference on network and system security, pp 269–273 Böhm C., Hofer M, Pribyl W (2011) A microcontroller SRAM-PUF. In: Proceedings of 2011 5th international conference on network and system security, pp 269–273
8.
go back to reference Chauhan AS, Sahula V, Mandal AS (2018) Novel placement bias for realizing highly reliable physical unclonable functions on FPGA. In: Proceedings of 2018 IEEE international conference on electronics, computing and communication technologies (CONECCT), pp 1–6 Chauhan AS, Sahula V, Mandal AS (2018) Novel placement bias for realizing highly reliable physical unclonable functions on FPGA. In: Proceedings of 2018 IEEE international conference on electronics, computing and communication technologies (CONECCT), pp 1–6
9.
go back to reference Chauhan AS, Sahula V, Mandal AS (2019) Novel randomized biased placement for FPGA based robust random number generator with enhanced uniqueness. In: Proceedings of 2019 32nd international conference on VLSI design and 2019 18th international conference on embedded systems (VLSID), pp 353–358 Chauhan AS, Sahula V, Mandal AS (2019) Novel randomized biased placement for FPGA based robust random number generator with enhanced uniqueness. In: Proceedings of 2019 32nd international conference on VLSI design and 2019 18th international conference on embedded systems (VLSID), pp 353–358
10.
go back to reference Daihyun L, Lee JW, Gassend B, Suh GE, van Dijk M, Devadas S (2005) Extracting secret keys from integrated circuits. IEEE Trans Very Large Scale Integr VLSI Syst 13(10):1200–1205CrossRef Daihyun L, Lee JW, Gassend B, Suh GE, van Dijk M, Devadas S (2005) Extracting secret keys from integrated circuits. IEEE Trans Very Large Scale Integr VLSI Syst 13(10):1200–1205CrossRef
11.
go back to reference Delvaux J, Verbauwhede I (2013) Side channel modeling attacks on 65nm arbiter PUFs exploiting CMOS device noise. In: Proceeidngs of 2013 IEEE international symposium on hardware-oriented security and trust (HOST), pp 137–142 Delvaux J, Verbauwhede I (2013) Side channel modeling attacks on 65nm arbiter PUFs exploiting CMOS device noise. In: Proceeidngs of 2013 IEEE international symposium on hardware-oriented security and trust (HOST), pp 137–142
12.
go back to reference Delvaux J, Verbauwhede I (2014) Fault injection modeling attacks on 65 nm arbiter and ro sum pufs via environmental changes. IEEE Trans Circuits Syst Regul Pap 61(6):1701–1713CrossRef Delvaux J, Verbauwhede I (2014) Fault injection modeling attacks on 65 nm arbiter and ro sum pufs via environmental changes. IEEE Trans Circuits Syst Regul Pap 61(6):1701–1713CrossRef
13.
go back to reference Dempster AP, Laird NM, Rubin DB (1977) Maximum likelihood from incomplete data via the EM algorithm. J R Stat Soc Ser B 39(1):1–38MathSciNetMATH Dempster AP, Laird NM, Rubin DB (1977) Maximum likelihood from incomplete data via the EM algorithm. J R Stat Soc Ser B 39(1):1–38MathSciNetMATH
14.
go back to reference Dichtl M, Golić JD (2007) High-speed true random number generation with logic gates only. In: Paillier P, Verbauwhede I (eds) Cryptographic hardware and embedded systems - CHES 2007. Springer, Berlin, pp 45–62 Dichtl M, Golić JD (2007) High-speed true random number generation with logic gates only. In: Paillier P, Verbauwhede I (eds) Cryptographic hardware and embedded systems - CHES 2007. Springer, Berlin, pp 45–62
15.
go back to reference Gan J, Zhou J, Wang N (2018) A FPGA-based RO PUF with LUT-based self-compare structure and adaptive counter time period tuning. In: Proceedings of 2018 IEEE international symposium on circuits and systems (ISCAS), pp 1–5 Gan J, Zhou J, Wang N (2018) A FPGA-based RO PUF with LUT-based self-compare structure and adaptive counter time period tuning. In: Proceedings of 2018 IEEE international symposium on circuits and systems (ISCAS), pp 1–5
16.
go back to reference Gassend B, Clarke D, van Dijk M, Devadas S (2002) Silicon physical random functions. In: Proceedings of the 9th ACM Conference on Computer and Communications Security, CCS ’02. ACM, New York, pp 148–160 Gassend B, Clarke D, van Dijk M, Devadas S (2002) Silicon physical random functions. In: Proceedings of the 9th ACM Conference on Computer and Communications Security, CCS ’02. ACM, New York, pp 148–160
17.
go back to reference Gu C, Hanley N, O’neill M (2017) Improved reliability of FPGA-based PUF identification generator design. ACM Trans Reconfigurable Technol Syst 10(3):20:1–20:23CrossRef Gu C, Hanley N, O’neill M (2017) Improved reliability of FPGA-based PUF identification generator design. ACM Trans Reconfigurable Technol Syst 10(3):20:1–20:23CrossRef
18.
go back to reference Gu C, Liu W, Hanley N, Hesselbarth R, O’Neill M (2019) A theoretical model to link uniqueness and min-entropy for PUF evaluations. IEEE Trans Comput 68(2):287–293MathSciNetCrossRef Gu C, Liu W, Hanley N, Hesselbarth R, O’Neill M (2019) A theoretical model to link uniqueness and min-entropy for PUF evaluations. IEEE Trans Comput 68(2):287–293MathSciNetCrossRef
19.
go back to reference Guajardo J, Kumar S, Schrijen G, Tuyls P (2007) FPGA intrinsic PUFs and their use for IP protection. In: Proceedings of the 9th international workshop on cryptographic hardware and embedded systems, CHES ’07. Springer, Berlin, pp 63–80 Guajardo J, Kumar S, Schrijen G, Tuyls P (2007) FPGA intrinsic PUFs and their use for IP protection. In: Proceedings of the 9th international workshop on cryptographic hardware and embedded systems, CHES ’07. Springer, Berlin, pp 63–80
20.
go back to reference Herkle A, Mandry H, Becker J, Ortmanns M (2019) In-depth analysis and enhancements of RO-PUFs with a partial reconfiguration framework on Xilinx Zynq-7000 SoC FPGAs. In: Proceeidngs of 2019 IEEE international symposium on hardware oriented security and trust (HOST), pp 238–247 Herkle A, Mandry H, Becker J, Ortmanns M (2019) In-depth analysis and enhancements of RO-PUFs with a partial reconfiguration framework on Xilinx Zynq-7000 SoC FPGAs. In: Proceeidngs of 2019 IEEE international symposium on hardware oriented security and trust (HOST), pp 238–247
21.
go back to reference Hesselbarth R, Wilde F, Gu C, Hanley N (2018) Large scale RO PUF analysis over slice type, evaluation time and temperature on 28nm Xilinx FPGAs. In: Proceedings of 2018 IEEE international symposium on hardware oriented security and trust (HOST), pp 126–133 Hesselbarth R, Wilde F, Gu C, Hanley N (2018) Large scale RO PUF analysis over slice type, evaluation time and temperature on 28nm Xilinx FPGAs. In: Proceedings of 2018 IEEE international symposium on hardware oriented security and trust (HOST), pp 126–133
22.
go back to reference Holcomb DE, Burleson WP, Fu K (2009) Power-up SRAM state as an identifying fingerprint and source of true random numbers. IEEE Trans Comput 58(9):1198–1210MathSciNetCrossRef Holcomb DE, Burleson WP, Fu K (2009) Power-up SRAM state as an identifying fingerprint and source of true random numbers. IEEE Trans Comput 58(9):1198–1210MathSciNetCrossRef
23.
go back to reference Johnson AP, Chakraborty RS, Mukhopadhyay D (2015) A PUF-enabled secure architecture for FPGA-based IoT applications. IEEE Transactions on Multi-Scale Computing Systems 1(2):110–122CrossRef Johnson AP, Chakraborty RS, Mukhopadhyay D (2015) A PUF-enabled secure architecture for FPGA-based IoT applications. IEEE Transactions on Multi-Scale Computing Systems 1(2):110–122CrossRef
24.
go back to reference Kanuparthi A, Karri R, Addepalli S (2013) Hardware and embedded security in the context of internet of things. In: Proceedings of the 2013 ACM workshop on security, privacy & dependability for cyber vehicles, CyCAR ’13. ACM, New York, pp 61–64 Kanuparthi A, Karri R, Addepalli S (2013) Hardware and embedded security in the context of internet of things. In: Proceedings of the 2013 ACM workshop on security, privacy & dependability for cyber vehicles, CyCAR ’13. ACM, New York, pp 61–64
25.
go back to reference Kodýtek F, Lórencz R, Buc̆ek J (2016) Improved ring oscillator PUF on FPGA and its properties. Microprocess Microsyst 47:55–63CrossRef Kodýtek F, Lórencz R, Buc̆ek J (2016) Improved ring oscillator PUF on FPGA and its properties. Microprocess Microsyst 47:55–63CrossRef
26.
go back to reference Kömürcü G, Pusane AE, Dündar G (2013) Dynamic programming based grouping method for RO-PUFs. In: Proceedings of the 2013 9th conference on Ph.D. research in microelectronics and electronics (PRIME), pp 329–332 Kömürcü G, Pusane AE, Dündar G (2013) Dynamic programming based grouping method for RO-PUFs. In: Proceedings of the 2013 9th conference on Ph.D. research in microelectronics and electronics (PRIME), pp 329–332
27.
go back to reference Kumar S, Guajardo J, Maes R, Schrijen G, Tuyls P (2008) Extended abstract: the butterfly PUF protecting IP on every FPGA. In: Proceedings of 2008 IEEE international workshop on hardware-oriented security and trust, pp 67–70 Kumar S, Guajardo J, Maes R, Schrijen G, Tuyls P (2008) Extended abstract: the butterfly PUF protecting IP on every FPGA. In: Proceedings of 2008 IEEE international workshop on hardware-oriented security and trust, pp 67–70
28.
go back to reference Lewis TG, Payne WH (1973) Generalized feedback shift register pseudorandom number algorithm. Journal of ACM (J ACM) 20(3):456–468CrossRef Lewis TG, Payne WH (1973) Generalized feedback shift register pseudorandom number algorithm. Journal of ACM (J ACM) 20(3):456–468CrossRef
29.
go back to reference Ma Q, Gu C, Hanley N, Wang C, Liu W, O’Neill M (2018) A machine learning attack resistant multi-PUF design on FPGA. In: Proceedings of 2018 23rd Asia and South Pacific design automation conference (ASP-DAC), pp 97–104 Ma Q, Gu C, Hanley N, Wang C, Liu W, O’Neill M (2018) A machine learning attack resistant multi-PUF design on FPGA. In: Proceedings of 2018 23rd Asia and South Pacific design automation conference (ASP-DAC), pp 97–104
30.
go back to reference Maes R, Maes R, Darmstadt TU (2012) Physically unclonable functions: Constructions, properties and applications. In: Ph.D. thesis, KU Leuven (2012), Ingrid Verbauwhede (promotor) Maes R, Maes R, Darmstadt TU (2012) Physically unclonable functions: Constructions, properties and applications. In: Ph.D. thesis, KU Leuven (2012), Ingrid Verbauwhede (promotor)
31.
go back to reference Maiti A, Casarona J, McHale L, Schaumont P (2010) A large scale characterization of RO-PUF. In: Proceedings of 2010 IEEE international symposium on hardware-oriented security and trust (HOST), pp 94–99 Maiti A, Casarona J, McHale L, Schaumont P (2010) A large scale characterization of RO-PUF. In: Proceedings of 2010 IEEE international symposium on hardware-oriented security and trust (HOST), pp 94–99
32.
go back to reference Maiti A, Schaumont P (2011) Improved ring oscillator PUF: an FPGA-friendly secure primitive. J Cryptol 24(2):375–397MathSciNetCrossRef Maiti A, Schaumont P (2011) Improved ring oscillator PUF: an FPGA-friendly secure primitive. J Cryptol 24(2):375–397MathSciNetCrossRef
33.
go back to reference Maiti A, Gunreddy V, Schaumont P (2013) A systematic method to evaluate and compare the performance of physical unclonable functions. Springer, New York, pp 245–267 Maiti A, Gunreddy V, Schaumont P (2013) A systematic method to evaluate and compare the performance of physical unclonable functions. Springer, New York, pp 245–267
34.
go back to reference Nozaki Y, Yoshikawa M (2020) Security evaluation of ring oscillator PUF against genetic algorithm based modeling attack. In: Barolli L, Xhafa F, Hussain OK (eds) Innovative mobile and internet services in ubiquitous computing. Springer International Publishing, Cham, pp 338–347 Nozaki Y, Yoshikawa M (2020) Security evaluation of ring oscillator PUF against genetic algorithm based modeling attack. In: Barolli L, Xhafa F, Hussain OK (eds) Innovative mobile and internet services in ubiquitous computing. Springer International Publishing, Cham, pp 338–347
35.
go back to reference Pappu R, Recht B, Taylor J, Gershenfeld N (2002) Physical one-way functions. Science 297 (5589):2026–2030CrossRef Pappu R, Recht B, Taylor J, Gershenfeld N (2002) Physical one-way functions. Science 297 (5589):2026–2030CrossRef
36.
go back to reference Rokach L, Maimon O (2005) Clustering methods. Springer, Boston, pp 321–352 Rokach L, Maimon O (2005) Clustering methods. Springer, Boston, pp 321–352
37.
go back to reference Rostami M, Koushanfar F, Karri R (2014) A primer on hardware security: models, methods, and metrics. Proc IEEE 102(8):1283–1295CrossRef Rostami M, Koushanfar F, Karri R (2014) A primer on hardware security: models, methods, and metrics. Proc IEEE 102(8):1283–1295CrossRef
38.
go back to reference Rührmair U, Sehnke F, Sölter J, Dror G, Devadas S, Schmidhuber J (2010) Modeling attacks on physical unclonable functions. In: Proceedings of the 17th ACM conference on computer and communications security, CCS ’10. ACM, New York, pp 237–249 Rührmair U, Sehnke F, Sölter J, Dror G, Devadas S, Schmidhuber J (2010) Modeling attacks on physical unclonable functions. In: Proceedings of the 17th ACM conference on computer and communications security, CCS ’10. ACM, New York, pp 237–249
39.
go back to reference Saha I, Jeldi RR, Chakraborty RS (2013) Model building attacks on physically unclonable functions using genetic programming. In: Proceedings of 2013 IEEE international symposium on hardware-oriented security and trust (HOST), pp 41–44 Saha I, Jeldi RR, Chakraborty RS (2013) Model building attacks on physically unclonable functions using genetic programming. In: Proceedings of 2013 IEEE international symposium on hardware-oriented security and trust (HOST), pp 41–44
40.
go back to reference Sahoo SR, Kumar S, Mahapatra K (2015) A modified configurable RO PUF with improved security metrics. In: Proceedings of 2015 IEEE international symposium on nanoelectronic and information systems, pp 320–324 Sahoo SR, Kumar S, Mahapatra K (2015) A modified configurable RO PUF with improved security metrics. In: Proceedings of 2015 IEEE international symposium on nanoelectronic and information systems, pp 320–324
41.
go back to reference Simons P, van der Sluis E, van der Leest V (2012) Buskeeper PUFs, a promising alternative to D flip-flop PUFs. In: Proceedings of 2012 IEEE international symposium on hardware-oriented security and trust (HOST), pp 7–12 Simons P, van der Sluis E, van der Leest V (2012) Buskeeper PUFs, a promising alternative to D flip-flop PUFs. In: Proceedings of 2012 IEEE international symposium on hardware-oriented security and trust (HOST), pp 7–12
42.
go back to reference Suh GE, Devadas S (2007) Physical unclonable functions for device authentication and secret key generation. In: Proceedings of 2007 44th ACM/IEEE design automation conference, pp 9–14 Suh GE, Devadas S (2007) Physical unclonable functions for device authentication and secret key generation. In: Proceedings of 2007 44th ACM/IEEE design automation conference, pp 9–14
43.
go back to reference Tang B, Lin Y, Zhang J (2014) Improving the reliability of RO PUF using frequency offset. In: Proceedings of 2014 international conference on field-programmable technology (FPT), pp 338–341 Tang B, Lin Y, Zhang J (2014) Improving the reliability of RO PUF using frequency offset. In: Proceedings of 2014 international conference on field-programmable technology (FPT), pp 338–341
44.
go back to reference Tehranipoor F, Karimian N, Yan W, Chandy JA (2017) A study of power supply variation as a source of random noise. In: Proceedings of 2017 30th international conference on VLSI design and 2017 16th international conference on embedded systems (VLSID), pp 155–160 Tehranipoor F, Karimian N, Yan W, Chandy JA (2017) A study of power supply variation as a source of random noise. In: Proceedings of 2017 30th international conference on VLSI design and 2017 16th international conference on embedded systems (VLSID), pp 155–160
45.
go back to reference Vyas S, Dumpala NK, Tessier R, Holcomb DE (2016) Improving the efficiency of PUF-based key generation in FPGAs using variation-aware placement. In: Proceedings of 2016 26th international conference on field programmable logic and applications (FPL), pp 1–4 Vyas S, Dumpala NK, Tessier R, Holcomb DE (2016) Improving the efficiency of PUF-based key generation in FPGAs using variation-aware placement. In: Proceedings of 2016 26th international conference on field programmable logic and applications (FPL), pp 1–4
46.
go back to reference Wang Q, Gao M, Qu G (2018) A machine learning attack resistant dual-mode PUF. In: Proceedings of the 2018 on great lakes symposium on VLSI, GLSVLSI ’18. ACM, New York, pp 177–182 Wang Q, Gao M, Qu G (2018) A machine learning attack resistant dual-mode PUF. In: Proceedings of the 2018 on great lakes symposium on VLSI, GLSVLSI ’18. ACM, New York, pp 177–182
50.
go back to reference Yamamoto D, Sakiyama K, Iwamoto M, Ohta K, Takenaka M, Itoh K (2013) Variety enhancement of PUF responses using the locations of random outputting RS latches. J Cryptogr Eng 3(4):197–211CrossRef Yamamoto D, Sakiyama K, Iwamoto M, Ohta K, Takenaka M, Itoh K (2013) Variety enhancement of PUF responses using the locations of random outputting RS latches. J Cryptogr Eng 3(4):197–211CrossRef
51.
go back to reference Yan W, Jin C, Tehranipoor F, Chandy JA (2017) Phase calibrated ring oscillator PUF design and implementation on FPGAs. In: Proceedings of 2017 27th international conference on field programmable logic and applications (FPL), pp 1–8 Yan W, Jin C, Tehranipoor F, Chandy JA (2017) Phase calibrated ring oscillator PUF design and implementation on FPGAs. In: Proceedings of 2017 27th international conference on field programmable logic and applications (FPL), pp 1–8
52.
go back to reference Yin C-E, Qu G (2009) Temperature-aware cooperative ring oscillator PUF. In: Proceedings of 2009 IEEE international workshop on hardware-oriented security and trust, pp 36–42 Yin C-E, Qu G (2009) Temperature-aware cooperative ring oscillator PUF. In: Proceedings of 2009 IEEE international workshop on hardware-oriented security and trust, pp 36–42
53.
go back to reference Yin C, Qu G (2013) Improving PUF security with regression-based distiller. In: Proceedings of 2013 50th ACM/EDAC/IEEE design automation conference (DAC), pp 1–6 Yin C, Qu G (2013) Improving PUF security with regression-based distiller. In: Proceedings of 2013 50th ACM/EDAC/IEEE design automation conference (DAC), pp 1–6
54.
go back to reference Yin C, Qu G, Zhou Q (2013) Design and implementation of a group-based RO PUF. In: Proceedings of 2013 design, automation test in europe conference exhibition (DATE), pp 416–421 Yin C, Qu G, Zhou Q (2013) Design and implementation of a group-based RO PUF. In: Proceedings of 2013 design, automation test in europe conference exhibition (DATE), pp 416–421
55.
go back to reference Yu H, Leong PHW, Xu Q (2010) An FPGA chip identification generator using configurable ring oscillator. In: Proc. of 2010 international conference on field-programmable technology, pp 312–315 Yu H, Leong PHW, Xu Q (2010) An FPGA chip identification generator using configurable ring oscillator. In: Proc. of 2010 international conference on field-programmable technology, pp 312–315
56.
go back to reference Zhang Q, Liu Z, Ma C, Li C, Zhang L (2017) FROPUF: How to extract more entropy from two ring oscillators in FPGA-based PUFs. In: Deng R, Weng J, Ren K, Yegneswaran V (eds) Security and privacy in communication networks. Springer International Publishing, Cham, pp 675–693 Zhang Q, Liu Z, Ma C, Li C, Zhang L (2017) FROPUF: How to extract more entropy from two ring oscillators in FPGA-based PUFs. In: Deng R, Weng J, Ren K, Yegneswaran V (eds) Security and privacy in communication networks. Springer International Publishing, Cham, pp 675–693
Metadata
Title
Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness
Authors
Arjun Singh Chauhan
Vineet Sahula
Atanendu Sekhar Mandal
Publication date
20-11-2019
Publisher
Springer US
Published in
Journal of Electronic Testing / Issue 5/2019
Print ISSN: 0923-8174
Electronic ISSN: 1573-0727
DOI
https://doi.org/10.1007/s10836-019-05829-5

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