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Published in:
The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack Read chapter Read first chapter

2018 | OriginalPaper | Chapter

8. Trusted Testing Techniques for Hardware Trojan Detection

Author : Hassan Salmani

Published in: Trusted Digital Circuits

Publisher: Springer International Publishing

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Abstract

Some hardware Trojans are activated/triggered upon receiving a unique and unexpected vector made of signals of an original circuit or a sequence of such a vector. The fact makes test generation for hardware Trojan detection an extremely challenging task considering the complexity of modern designs and their verity of application. This chapter presents an overview on some of major efforts toward various test generation techniques for hardware Trojan detection after circuit manufacturing.

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previous chapter Design Techniques for Hardware Trojans Prevention and Detection at the Layout Level
next chapter Hardware Trojans in Analog and Mixed-Signal Integrated Circuits
Literature
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R.S. Chakraborty, F. Wolff, S. Paul, C. Papachristou, S. Bhunia, MERO: A Statistical Approach for Hardware Trojan Detection (Springer, Berlin, 2009), pp. 396–410
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J. Cruz, F. Farahmandi, A. Ahmed, P. Mishra, Hardware Trojan detection using ATPG and model checking, in International Conference on VLSI Design (2018), pp. 1–6
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Metadata
Title
Trusted Testing Techniques for Hardware Trojan Detection
Author
Hassan Salmani
Copyright Year
2018
Book
Trusted Digital Circuits

Print ISBN: 978-3-319-79080-0

Electronic ISBN: 978-3-319-79081-7

Copyright Year: 2018

DOI
https://doi.org/10.1007/978-3-319-79081-7_8