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2018 | Book

The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack Read chapter Read first chapter

Trusted Digital Circuits

Hardware Trojan Vulnerabilities, Prevention and Detection

Author: Prof. Hassan Salmani

Publisher: Springer International Publishing

Part of: Springer Professional "Wirtschaft+Technik" , Springer Professional "Technik" , Springer Professional "Wirtschaft"

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About this book

This book describes the integrated circuit supply chain flow and discusses security issues across the flow, which can undermine the trustworthiness of final design. The author discusses and analyzes the complexity of the flow, along with vulnerabilities of digital circuits to malicious modifications (i.e. hardware Trojans) at the register-transfer level, gate level and layout level. Various metrics are discussed to quantify circuit vulnerabilities to hardware Trojans at different levels. Readers are introduced to design techniques for preventing hardware Trojan insertion and to facilitate hardware Trojan detection. Trusted testing is also discussed, enabling design trustworthiness at different steps of the integrated circuit design flow. Coverage also includes hardware Trojans in mixed-signal circuits.

Table of Contents

Frontmatter
Chapter 1. The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack
Abstract
The complexity of modern designs, the significant cost of research and development, and the shrinking time-to-market window heavily enforce the horizontal integrated circuit design flow. Many entities across the globe might be involved in the flow and none are necessarily trusted. A malicious party can implement a hardware Trojan attack through manipulating a circuit to undermine its characteristics under rare circumstances at different stages of the flow before and after circuit manufacturing. Detection of hardware Trojans using existing pre-silicon and post-silicon verification techniques is a very challenging task because of the complexity of modern designs, their verity of application, and limited time for verification. This chapter provides an overview on the global supply chain for integrated circuits and the hardware Trojan attack.
Hassan Salmani
Chapter 2. Circuit Vulnerabilities to Hardware Trojans at the Register-Transfer Level
Abstract
Realized by modifying design implementation, hardware Trojans can interfere with any step of the design process. A hardware Trojan may undermine a system’s confidentiality by leaking secret information or can abrogate system availability by performing a malfunction. Soft third-party intellectual properties (IPs) are extensively used in high-level implementation, and they are highly vulnerable to hardware Trojan insertion. Therefore, there is a need for systematic approaches to assess vulnerabilities of a circuit to hardware Trojan insertion and to identify potential hardware Trojan locations at the register-transfer level.
Hassan Salmani
Chapter 3. Design Techniques for Hardware Trojans Prevention and Detection at the Register-Transfer Level
Abstract
Outsourcing design development and extensive usage of untrusted intellectual properties make modern complex designs highly susceptible to hardware Trojan insertion at the register-transfer level. As existing pre-silicon verification techniques are not designed toward hardware Trojans, there is need for hardware Trojan prevention and detection techniques at the register-transfer level to ensure the trustworthiness of designs. This chapter reviews and discusses some of proposed techniques for hardware Trojan prevention and detection at the register-transfer level.
Hassan Salmani
Chapter 4. Circuit Vulnerabilities to Hardware Trojans at the Gate Level
Abstract
A gate-level netlist is a description of the connectivity of a circuit. To meet design constraints such as time to market and product cost, gate-level netlists as firm IPs are commonly used for complex circuits implementation. Meanwhile, not all entities providing gate-level netlists are trusted and they may modify expected circuit functionality or use unused portions of a circuit to realize a hardware Trojan. Therefore, there is a serious demand to gate-level vulnerability analyses and security metrics to determine hard-to-detect areas in a circuit that would most probably be used for hardware Trojan implementation to ensure the hardware Trojan goes undetected during production test and extensive functional test analyses.
Hassan Salmani
Chapter 5. Design Techniques for Hardware Trojans Prevention and Detection at the Gate Level
Abstract
A hardware Trojan can be inserted in a gate-level netlist by a rogue designer, or it already exists in a provided gate-level netlist (e.g., a firm intellectual property) by an untrusted third-party design developer. Various techniques have been proposed to prevent hardware Trojan insertion or to detect hardware Trojans at the gate level. This chapter studies some of the major existing techniques and discusses their effectiveness.
Hassan Salmani
Chapter 6. Circuit Vulnerabilities to Hardware Trojan at the Layout Level
Abstract
While the horizontal integrated circuit design process is extensively practiced, untrusted foundries can impose significant threats on the security of final products. A carefully-inserted extra circuitry as a Hardware Trojan in a circuit layout can interfere with circuit functionality under very rare circumstances with inconsiderable footprints. The fact necessitates comprehensive layout-level vulnerability analyses to evaluate the susceptibility of a circuit layout’s regions to hardware Trojan insertion. Further, there is a serious demand to metrics based on a circuit layout to quantify the possibility of hardware Trojan insertion in a specific region of layout.
Hassan Salmani
Chapter 7. Design Techniques for Hardware Trojans Prevention and Detection at the Layout Level
Abstract
Addressing hardware Trojans at the layout level has mainly focused on two sets of techniques: some techniques are to prevent hardware Trojan insertion by an untrusted manufacturer, and some other techniques are to improve hardware Trojan detection after circuit manufacturing. This chapters studies some of major work in this area and discusses their effectiveness.
Hassan Salmani
Chapter 8. Trusted Testing Techniques for Hardware Trojan Detection
Abstract
Some hardware Trojans are activated/triggered upon receiving a unique and unexpected vector made of signals of an original circuit or a sequence of such a vector. The fact makes test generation for hardware Trojan detection an extremely challenging task considering the complexity of modern designs and their verity of application. This chapter presents an overview on some of major efforts toward various test generation techniques for hardware Trojan detection after circuit manufacturing.
Hassan Salmani
Chapter 9. Hardware Trojans in Analog and Mixed-Signal Integrated Circuits
Abstract
Modern designs are a mix of digital and analog circuits, and they exist in many real-life applications such as smart phones, sensors, and wireless communications. While there has been a relatively high concentration on the security of digital circuits, the security of analog and mixed-signal (AMS) integrated circuits (ICs) has not gained enough attention. This chapter studies hardware Trojan design, prevention and detection in AMS ICs, and highlights some of major challenges that demand further research.
Hassan Salmani
Metadata
Title
Trusted Digital Circuits
Author
Prof. Hassan Salmani
Copyright Year
2018
Electronic ISBN
978-3-319-79081-7
Print ISBN
978-3-319-79080-0
DOI
https://doi.org/10.1007/978-3-319-79081-7