Top

Journal of Computational Electronics

Published in:

05-06-2017

2-D analytical modeling for electrostatic potential and threshold voltage of a dual work function gate Schottky barrier MOSFET

Authors: Prashanth Kumar, Brinda Bhowmick

Published in: Journal of Computational Electronics | Issue 3/2017

Activate our intelligent search to find suitable subject content or patents.

search-config

AI-assisted search

Off

Abstract

A two-dimensional analytical model for the surface potential and threshold voltage of a dual work function Schottky barrier (SB) MOSFET is presented. The developed model considers the effects of the varying gate metal work function, gate and drain voltages, and different doping concentrations, gate dielectric permittivity, and silicon thickness. For solving the electrostatic potential of the SB-MOSFET by using Poisson’s equation with appropriate boundary conditions, parabolic approximation has been considered. The proposed device has also incorporated the effect of barrier height lowering at the metal/semiconductor contacts. The results of our modeled surface potential and the threshold voltage, match with technology computer aided design simulations.

previous article Compact 2D threshold voltage modeling and performance analysis of ternary metal alloy work-function-engineered double-gate MOSFET

next article New technique to extend the vertical depletion region at SOI-LDMOSFETs

Dont have a licence yet? Then find out more about our products and how to get one now:

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

über 102.000 Bücher
über 537 Zeitschriften

aus folgenden Fachgebieten:

Automobil + Motoren
Bauwesen + Immobilien
Business IT + Informatik
Elektrotechnik + Elektronik
Energie + Nachhaltigkeit
Finance + Banking
Management + Führung
Marketing + Vertrieb
Maschinenbau + Werkstoffe
Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

inform now

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

über 67.000 Bücher
über 390 Zeitschriften

aus folgenden Fachgebieten:

Automobil + Motoren
Bauwesen + Immobilien
Business IT + Informatik
Elektrotechnik + Elektronik
Energie + Nachhaltigkeit
Maschinenbau + Werkstoffe

Jetzt Wissensvorsprung sichern!

inform now

Springer Professional "Wirtschaft"

Online-Abonnement

Mit Springer Professional "Wirtschaft" erhalten Sie Zugriff auf:

über 67.000 Bücher
über 340 Zeitschriften

aus folgenden Fachgebieten:

Bauwesen + Immobilien
Business IT + Informatik
Finance + Banking
Management + Führung
Marketing + Vertrieb
Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

inform now

Lundstrom, M., Ren, Z.: Essential physics of carrier transport in nanoscale MOSFETs. IEEE Trans. Electron Devices 49, 133–141 (2002)CrossRef

Saitoh, W., Itoh, A., Yamagami, S., Asada, M.: Analysis of short-channel schottky source/drain metal-oxide-semiconductor field-effect transistor on silicon-on-insulator substrate and demonstration of sub-50-nm n-type devices with metal gate. Jpn. J. Appl. Phys. 38, 6226 (1999)CrossRef

Sze, S.M.: Physics of Semiconductor Devices, 2nd edn. Wiley, New York (1981)

Larson, J.M., Snyder, J.P.: Overview and status of metal S/D schottky-barrier MOSFET technology. IEEE Trans. Electron. Devices 53, 1048–1058 (2006)CrossRef

Huang, C.-K., Zhang, W.E., Yang, C.H.: Two-dimensional numerical simulation of schottky barrier MOSFET with channel length to 10 nm. IEEE Trans. Electron. Devices 45, 842–848 (1998)CrossRef

Dubois, E., Larrieu, Guilhem: Low schottky barrier source/drain for advanced MOS architecture device design and material considerations. Solid-State Electron. 46, 997–1004 (2002)CrossRef

Zhu, S., Chen, J., Li, M.-F., Lee, S.J., Singh, J., Zhu, C.X., Du, A., Tung, C.H., Chin, A., Kwong, D.L.: N-Type schottky barrier source/drain MOSFET Using Ytterbium Silicide. IEEE Electron Device Lett. 25, 565–567 (2004)CrossRef

Dimoulas, A., Tsipas, P., Sotiropoulos, A., Evangelou, E.K.: Fermi-level pinning and charge neutrality level in germanium. Appl. Phys. Lett. 89, 252110 (2006)CrossRef

Jin, L., Hong-Xia, L., Bin, L., Lei, C., Bo, Y.: Study on two-dimensional analytical models for symmetrical gate stack dual gate strained silicon MOSFETs. Chin. Phys. B 19, 107302 (2010)CrossRef

10.

Kumar, M.J., Venkataraman, V., Nawal, S.: A simple analytical threshold voltage model of nanoscale single-layer fully depleted strained-silicon-on-insulator MOSFETs. IEEE Trans. Electron Devices 53, 2500–2506 (2006)CrossRef

11.

SILVACO International Incorporated: ATLAS user’s manual, version 5.12.0.R. Silvaco Inc. (2013)

12.

Padilla, J.L., Knoll, L., Gamiz, F., Zhao, Q.T., Godoy, A., Mantl, S.: Simulation of Fabricated 20-nm schottky barrier MOSFETs on SOI: impact of Barrier Lowering. IEEE Trans. Electron Devices 59, 1320–1327 (2012)CrossRef

13.

Young, K.K.: Short-channel effect in fully depleted SOI MOSFETs. IEEE Trans. Electron Devices 36, 399–402 (1989)CrossRef

14.

Kumar, M., Haldar, S., Gupta, M., Gupta, R.S.: Analytical model of threshold voltage degradation due to localized charges in gate material engineered schottky barrier cylindrical GAA MOSFETs. Semicond. Sci. Technol. 31, 105013 (2016)CrossRef

15.

Kumar, M., Dubey, S., Tiwari, P.K., Jit, S.: An analytical model of threshold voltage for short-channel double-material-gate (DMG) strained-Si (s-Si) on Silicon-Germanium-on-Insulator (SGOI) MOSFETs. J. Comput. Electron. 12, 20–28 (2013)CrossRef

16.

Kaur, H., Kabra, S., Haldar, S., Gupta, R.S.: An analytical threshold voltage model for graded channel asymmetric gate stack (GCASYMGAS) surrounding gate MOSFET. Solid-State Electron. 52, 305–311 (2008)CrossRef

17.

Goel, E., Kumar, S., Singh, K., Singh, B., Kumar, M., Jit, S.: 2-D analytical modeling of threshold voltage for graded-channel dual-material double-gate MOSFETs. IEEE Trans. Electron Devices 63, 966–973 (2016)

18.

Saxena, M., Haldar, S., Gupta, M., Gupta, R.S.: Physics-based analytical modeling of potential and electrical field distribution in dual material gate (DMG)-MOSFET for improved hot electron effect and carrier transport efficiency. IEEE Trans. Electron Devices 49, 1928–1938 (2002)

19.

Mukherjee, S., Bandyopadhyay, D., Dutta, P.K., Sarkar, S.K.: Quantum analytical modeling and simulation of CNT on insulator (COI) and CNT on nothing (CON) FET: a comparative analysis. J. Theor. Appl. Phys. 10, 91–97 (2016)CrossRef

20.

Chiang, T.-K.: A new analytical subthreshold behavior model for single-halo, dual-material gate silicon-on-insulator metal oxide semiconductor field effect transistor. Jpn. J. Appl. Phys. 47, 8297 (2008)CrossRef

Title: 2-D analytical modeling for electrostatic potential and threshold voltage of a dual work function gate Schottky barrier MOSFET
Authors: Prashanth Kumar
Brinda Bhowmick
Publication date: 05-06-2017
Publisher: Springer US
Published in: Journal of Computational Electronics / Issue 3/2017
Print ISSN: 1569-8025
Electronic ISSN: 1572-8137
DOI: https://doi.org/10.1007/s10825-017-1011-x

Springer Professional

Abstract

Please log in to get access to your license.

Dont have a licence yet? Then find out more about our products and how to get one now:

Springer Professional "Wirtschaft+Technik"

Springer Professional "Technik"

Springer Professional "Wirtschaft"

Other articles of this Issue 3/2017

Numerical simulation of plasma waves in a quasi-2D electron gas based on the Boltzmann transport equation

Bandgap-dependent onset behavior of output characteristics in line-tunneling field-effect transistors

Electron transport through 8-oxoG: NEGF/DFT study

Thermal optimization of IGBT modules based on finite element method and particle swarm optimization

Novel designs of a carry/borrow look-ahead adder/subtractor using reversible gates

A computational study of the optoelectronic and thermoelectric properties of HfIrX (X = As, Sb and Bi) in the cubic LiAlSi-type structure