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Journal of Electronic Testing

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01-02-2014

Clock Faults Induced Min and Max Delay Violations

Authors: D. Rossi, M. Omaña, J. M. Cazeaux, C. Metra, T. M. Mak

Published in: Journal of Electronic Testing | Issue 1/2014

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Abstract

In this paper, we show that clock faults producing duty-cycle variations, which have been proven very likely, can give rise to min or max delay violations. This mandates new, specific testing approaches for clock faults, to avoid them to compromise the system correct operation in the field, with dramatic effects on product quality and defect level. We then introduce a new scheme that can be employed to detect the clock faults causing duty-cycle variations.

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Title: Clock Faults Induced Min and Max Delay Violations
Authors: D. Rossi
M. Omaña
J. M. Cazeaux
C. Metra
T. M. Mak
Publication date: 01-02-2014
Publisher: Springer US
Published in: Journal of Electronic Testing / Issue 1/2014
Print ISSN: 0923-8174
Electronic ISSN: 1573-0727
DOI: https://doi.org/10.1007/s10836-013-5426-4

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