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IEEE 754 Floating Point Pipelined Multiplier with Karatsuba for Mitigations of Area and Power Read chapter Read first chapter

2021 | OriginalPaper | Chapter

Design of a Novel High-Q Active Inductor at 2.5 GHz in CMOS 180-nm Technology

Authors : Moumita Das, Shrabanti Das, Swarup Dandapat, Sayan Chattearjee

Published in: Computers and Devices for Communication

Publisher: Springer Singapore

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Abstract

This paper represents a novel approach of an inductor design having a high-quality factor using cascode topology. The proposed inductor consists of gyrator-C-based active inductor and parallel resonance circuit which are basically comprised of low value of spiral inductor and capacitor. This is validated in Cadence Virtuoso Tool using TSMC 180 nanometer technology CMOS process with power supply of 1.8 V. The designed inductor represents the inductance of above 40 nH with quality factor of over 880 around 2.45 GHz.

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previous chapter Performance Enhancement of InGaN/GaN Green QW LEDs with Different Interlayers and Doping in the Barriers
next chapter Design of a Low-Power Linear Down-Conversion Mixer at 2.45 GHz CMOS 180-nm Technology
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Metadata
Title
Design of a Novel High-Q Active Inductor at 2.5 GHz in CMOS 180-nm Technology
Authors
Moumita Das
Shrabanti Das
Swarup Dandapat
Sayan Chattearjee
Copyright Year
2021
Publisher
Springer Singapore
Book
Computers and Devices for Communication

Print ISBN: 978-981-15-8365-0

Electronic ISBN: 978-981-15-8366-7

Copyright Year: 2021

DOI
https://doi.org/10.1007/978-981-15-8366-7_72