Effects of temperature and channel thickness on digital and analog performance of InAs quantum well nMOSFETs

Among various III–V semiconductors, InAs stands out promising, due largely to its outstanding electron mobility and injection velocity alongside better electrostatic integrity in a thin-body architecture. Using well-calibrated TCAD simulation we systematically investigate and analyze the logic performance in terms of ON-current, OFF-current, ON–OFF current ratio and intrinsic delay and also analog performance in terms of transconductance, output conductance, transconductance generation factor and intrinsic voltage gain of InAs quantum well nMOSFETs for channel thicknesses of 5, 8 and 10 nm at channel length of 14 nm. Also we report the variation of such parameters with temperature ranging from 300 down to 150 K. Our findings reveal that InAs quantum well device with a channel thickness of 10 nm exhibits the highest value of ON-current at 300 K which is 27.54% larger than that of 5 nm channel device. The lowest intrinsic delay is obtained at 300 K for the device with channel thickness of 10 nm. Additionally the lowest value of OFF-current is obtained at 150 K while the highest I_ON/I_OFF ratio is attained at 300 K for device with channel thickness of 5 nm. Moreover, our findings show that while 5-nm-thick channel InAs device yields improved output conductance, transconductance efficiency and intrinsic voltage gain compared to other InAs devices, 10-nm-thick channel InAs device exhibits improvement in transconductance compared to other InAs devices, for the entire range of temperature. Our work advocates the use of InAs quantum well MOSFETs for analog and digital applications in more advanced technology nodes.