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Published in: Microsystem Technologies 3/2017

11-05-2016 | Technical Paper

Ultra high gain CMOS Op-Amp design using self-cascoding and positive feedback

Authors: Subhra Chakraborty, Abhishek Pandey, Vijay Nath

Published in: Microsystem Technologies | Issue 3/2017

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Abstract

This paper presents an ultra high gain two stage CMOS Operational Amplifier which is designed using self-cascoding and positive feedback technique in order to provide gain enhancement. By comparing the circuit with other designed circuits it has been shown that applying positive feedback increases the gain of the Op-Amp without affecting other properties of the amplifier. The proposed circuit is designed in 45 nm technology using Cadence Virtuoso Analog Design Environment tool at ±1 V supply. The Op-Amp is designed to achieve a high gain of 141 dB while maintaining a UGB of 101 MHz and phase margin of 60°. The simulation results conforms the estimated theoretical improvements. The dependence of various properties such as slew rate, UGB, settling time and phase margin of the designed Op-Amp on compensating capacitor CC has also been analyzed in this paper. Finally, the simulation results have been compared with a previously reported Op-Amp utilizing positive feedback technique.

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Metadata
Title
Ultra high gain CMOS Op-Amp design using self-cascoding and positive feedback
Authors
Subhra Chakraborty
Abhishek Pandey
Vijay Nath
Publication date
11-05-2016
Publisher
Springer Berlin Heidelberg
Published in
Microsystem Technologies / Issue 3/2017
Print ISSN: 0946-7076
Electronic ISSN: 1432-1858
DOI
https://doi.org/10.1007/s00542-016-2971-7

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