Skip to main content
Disciplines
Automotive Business IT + Informatics Construction + Real Estate Electrical Engineering + Electronics Energy + Sustainability Insurance + Risk Finance + Banking Management + Leadership Marketing + Sales Mechanical Engineering + Materials
Events
DE
EN
Books
Journals
Topic Page
Marketing
Start single access now
Access for companies
EXTENDED SEARCH
Log in
Top

2017 | Book

IoT: Bird’s Eye View, Megatrends and Perspectives Read chapter Read first chapter

Enabling the Internet of Things

From Integrated Circuits to Integrated Systems

Editor: Massimo Alioto

Publisher: Springer International Publishing

Part of: Springer Professional "Wirtschaft+Technik" , Springer Professional "Technik" , Springer Professional "Wirtschaft"

Login to get access
insite
SEARCH

About this book

This book offers the first comprehensive view on integrated circuit and system design for the Internet of Things (IoT), and in particular for the tiny nodes at its edge. The authors provide a fresh perspective on how the IoT will evolve based on recent and foreseeable trends in the semiconductor industry, highlighting the key challenges, as well as the opportunities for circuit and system innovation to address them. This book describes what the IoT really means from the design point of view, and how the constraints imposed by applications translate into integrated circuit requirements and design guidelines. Chapter contributions equally come from industry and academia.

After providing a system perspective on IoT nodes, this book focuses on state-of-the-art design techniques for IoT applications, encompassing the fundamental sub-systems encountered in Systems on Chip for IoT:

ultra-low power digital architectures and circuits

low- and zero-leakage memories (including emerging technologies)

circuits for hardware security and authentication

System on Chip design methodologies

on-chip power management and energy harvesting

ultra-low power analog interfaces and analog-digital conversion

short-range radios

miniaturized battery technologies

packaging and assembly of IoT integrated systems (on silicon and non-silicon substrates).

As a common thread, all chapters conclude with a prospective view on the foreseeable evolution of the related technologies for IoT. The concepts developed throughout the book are exemplified by two IoT node system demonstrations from industry.

The unique balance between breadth and depth of this book:

enables expert readers quickly to develop an understanding of the specific challenges and state-of-the-art solutions for IoT, as well as their evolution in the foreseeable futureprovides non-experts with a comprehensive introduction to integrated circuit design for IoT, and serves as an excellent starting point for further learning, thanks to the broad coverage of topics and selected references

makes it very well suited for practicing engineers and scientists working in the hardware and chip design for IoT, and as textbook for senior undergraduate, graduate and postgraduate students ( familiar with analog and digital circuits).

Table of Contents

Frontmatter
1. IoT: Bird’s Eye View, Megatrends and Perspectives
Abstract
This chapter opens the book and provides a summary of the challenges and the opportunities that are offered by the Internet of Things (IoT), with emphasis on the aspects that are relevant to integrated circuit and system design from circuits to packaging for IoT nodes. The chapter is organized along a chronological perspective, first reviewing technology historical trends beyond mere Moore’s law, and summarizing recent past achievements and capabilities that are making the IoT possible. Then, present challenges are described, as pathway to up-coming advances and developments in the design of IoT nodes. Finally, mega-trends are examined to unearth clues on longer-term evolution of the IoT and the implications on integrated system design.
Massimo Alioto
2. IoT Nodes: System-Level View
Abstract
In this chapter, we detail the key elements of the wireless sensor network nodes architectures. We also review the most important tradeoffs to make in order to maximize the system energy efficiency, keeping the cost of the solution under control. We also review the pairing and registration operations and detail the security requirements as well as the impact of security on the energy efficiency and the cost of the solution.
Pascal Urard, Mališa Vučinić
3. Ultra-Low-Power Digital Architectures for the Internet of Things
Abstract
This chapter introduces the architectures implementing the digital processing platforms and control for Internet of things applications. It will provide a review of the state of the art Ultra-Low-Power (ULP) micro-controllers architecture, highlighting main challenges and perspectives, introducing the potential of exploiting parallelism in this field currently dominated by single issue processors.
Davide Rossi, Igor Loi, Antonio Pullini, Luca Benini
4. Near-Threshold Digital Circuits for Nearly-Minimum Energy Processing
Abstract
This chapter addresses the challenges and the opportunities to perform computation with nearly-minimum energy consumption through the adoption of logic circuits operating at near-threshold voltages. Simple models are provided to gain an insight into the fundamental design tradeoffs. A wide set of design techniques is presented to preserve the nearly-minimum energy feature in spite of the fundamental challenges in terms of performance, leakage and variations. Emphasis is given on debunking the incorrect assumptions that stem from traditional low-power common wisdom at above-threshold voltages.
Massimo Alioto
5. Energy Efficient Volatile Memory Circuits for the IoT Era
Abstract
This chapter addresses the challenges involved in designing energy efficient embedded volatile Static Random Access Memory (SRAM) circuits for IoT era. It discusses memory design for wide voltage range operation using 6 Transistor (6T), 8T and 10T bitcells and novel circuit assist techniques. In addition, it discusses future memory designs using emerging nano-wire FET, Tunnel FET, III-V FET, and monolithic 3-D technologies.
Jaydeep P. Kulkarni, James W. Tschanz, Vivek K. De
6. On-Chip Non-volatile Memory for Ultra-Low Power Operation
Abstract
This chapter addresses trends and challenges in the development of on-chip (embedded) non-volatile memory (NVM) for ultra-low power operation. Various NVM technologies have been introduced, including Flash, OTP/MTP, resistive RAM, and phase-change memory (PCM). In the following, we examine some of the challenges in the design of circuits used for read and write operations. Future trends in ultra-low-power NVM are also discussed.
Meng-Fan Chang
7. On-Chip Non-volatile STT-MRAM for Zero-Standby Power
Abstract
In this Chapter, we present spin-transfer torque magnetic random access memory (STT-MRAM) suitable for IoT applications. Its ability to operate at low supply voltages, non-volatility, good endurance, and small bit-cell footprint are especially attractive for IoT applications in which low energy consumption is crucial. We will present the fundamentals of STT-MRAM. The design of the STT-MRAM storage device, memory bit-cell and memory array architecture are also discussed to highlight the benefits STT-MRAM brings to IoT applications, as well as the design issues that need to be considered. We then present a device/circuit/architecture co-design approach for STT-MRAM. Finally, we will discuss the trends in STT-MRAM and give some perspectives on the future of STT-MRAM design.
Xuanyao Fong, Kaushik Roy
8. Security Down to the Hardware Level
Abstract
This chapter introduces the concept of Physically Unclonable Functions (PUFs), their prospects for hardware security in IoT devices, and their interaction with traditional cryptography. Section 8.1 summarizes the background on PUFs, whereas Sect. 8.2 covers the metrics that are commonly used to evaluate PUF performance. Such metrics are used to comparatively review the state of the art on PUFs in Sect. 8.3. Section 8.4 covers vulnerabilities to malicious attacks attempting to clone or mimic a PUF. In the last section, we introduce the novel concept of PUF-enhanced cryptography as a promising direction aiming to merge PUFs and cryptography in a cohesive framework for IoT hardware-level security.
Anastacia Alvarez, Massimo Alioto
9. Design Methodologies for IoT Systems on a Chip
Abstract
This chapter addresses the approaches and methodologies appropriate to energy-constrained SoC design, implementation and verification using standard multi-voltage Electronic Design Automation tools, rather than resorting to full-custom circuit approaches. The Physical-IP libraries, memories and power-management components required to address both active-mode energy and deep-sleep state retention power are introduced, followed by a case study addressing the specific challenges of optimizing a micro-processor subsystem for Near- and Sub-Threshold Voltage operation. As well as system level power management the implementation and verification of clock distribution and system timing closure are covered in detail.
David Flynn, James Myers, Seng Toh
10. Power Management Circuit Design for IoT Nodes
Abstract
This chapter addresses the fundamental structures and operation principles of power management circuits that are commonly used in IoT applications. Following a brief discussion on system design considerations, this chapter reviews the essential power circuit topologies with discussions on key control and operation principles, performance features and drawbacks. With the focus on IoT applications, state-of-the-art works and promising design trends are addressed.
D. Brian Ma, Yan Lu
11. Energy Harvesting
Abstract
This chapter complements other chapters on battery technologies and on-chip DC-DC conversion, and mainly addresses the challenges of designing low power IoT nodes that are powered by energy harvesting sources, which is the key enabling technology to extend battery life and minimize manual battery maintenance, using in situ power extraction from the surrounding. Energy harvesting options, circuit concepts, considerations and trade-offs regarding circuit topology, passive component and CMOS process are surveyed. In particular, recent circuit solutions involving non-conventional power management schemes specifically catering for energy-harvesting-assisted IoT systems will be discussed and compared.
Ying-Khai Teh, Philip K. T. Mok
12. Ultra-Low Power Analog Interfaces for IoT
Abstract
This chapter addresses the challenges and design strategies in Analog Front-End (AFE) interface circuit design with an umbrella of IoT. A stringent energy constraint in IoT means the circuit specification must take into account the energy-efficient operation. Also, at the same constraint, the dynamic and static offset/noise compensation should be done effectively.
Jerald Yoo
13. Ultra-Low Power Analog-Digital Converters for IoT
Abstract
This chapter addresses ADCs for IoT nodes, which are needed to digitize sensor information before processing, storage or wireless transmission. ADCs are also required for the radio communication channel. This chapter focusses on successive approximation (SAR) ADCs, a popular architecture for IoT thanks to their high power-efficiency. After deriving requirements for IoT, the design basics of SAR ADCs are discussed, followed by various design examples to illustrate key enabling techniques.
Pieter Harpe
14. Circuit Techniques for IoT-Enabling Short-Range ULP Radios
Abstract
This chapter addresses the design of cost-aware ultra-low-power (ULP) radios for both 2.4-GHz and sub-GHz ISM bands. Starting from the system aspects that provide the essential insights, effective circuit techniques are presented to improve the radio performances and power efficiency, while minimizing the die area and number of external components.
Pui-In Mak, Zhicheng Lin, Rui Paulo Martins
15. Battery Technologies for IoT
Abstract
Although IoT devices appear in myriad physical configurations and serve countless purposes, the battery requirements for any particular category of IoT devices can be evaluated by recognizing their physical, electrical, and functional elements as follows:
Jeff Sather
16. System Packaging and Assembly in IoT Nodes
Abstract
The internet of things is the networks of physical “thing” embedded with sensors, integrated circuits and power source. Thus, packaging all these elements into one IoT nodes is essential for promoting this technology. In this chapter, some of the popular and commercially available packaging technologies such as wire bonding, flip-chip bonding, tape automated bonding, etc. are reviewed. Secondly, wafer level packaging is emphasized as it can be used as a low cost packaging technology, usually because the packaging cost is much higher than other cost associated with device manufacturing. Recent progress on packaging for wearable electronics, silicon Photonics and energy harvesters are also included. In the later part, infrared sensors have been used to demonstrate the packaging constraints imposed by device performance and application requirements, various packaging solutions available at an individual sensor level and complicated array level.
You Qian, Chengkuo Lee
17. An IPv6 Energy-Harvested WSN Demonstrator Compatible with Indoor Applications
Abstract
In this chapter, we present the results of a research project that was developed in ST with key partners over several years. It is an energy-harvested, self-healing, secured IPv6 Wireless Sensor & Actuator Network (WSAN), designed for indoor environments. Pairing and installation have been taken into account to propose a complete system solution. GreenNet has demonstrated that it is possible to achieve autonomy with upcoming radio generations. However, this is possible only if certain cross-layer optimizations are performed throughout the software stack. Details and results are provided along the chapter.
Pascal Urard, Liviu Varga, Mališa Vučinić, Roberto Guizzetti
18. Ferro-Electric RAM Based Microcontrollers: Ultra-Low Power Intelligence for the Internet of Things
Abstract
Microcontrollers (MCUs) serve a central role in the design of IoT leaf nodes. A typical microcontroller comprises of a processing core, program and data memory, serial communication interfaces, general purpose IO (GPIOs) ports, comparators and ADCs, clock generation and power regulators. Microcontrollers have modest clock frequencies and memory capacities, keeping the IC cost low. High level of integration helps improves performance, lowers power and helps achieve a small form factor. All of these are critical in the design of ICs for IoT applications. This chapter focuses on the design of low power microcontrollers using two Texas Instruments (TI) microcontrollers as examples. Both microcontrollers feature embedded Ferro-electric RAM (FRAM) as a low power non-volatile unified data and program memory. Low write power non-volatile memory with high write endurance (number of write cycles) is critical in IoT applications that feature data logging. FRAM has low power writes at 1.5 V, practically unlimited write endurance (>1015), and high yields with millions of shipped parts. In the following sections we describe analog, digital and system design techniques that help achieve the low power metrics in TI microcontrollers.
Sudhanshu Khanna, Mark Jung, Michael Zwerg, Steven Bartling
Metadata
Title
Enabling the Internet of Things
Editor
Massimo Alioto
Copyright Year
2017
Electronic ISBN
978-3-319-51482-6
Print ISBN
978-3-319-51480-2
DOI
https://doi.org/10.1007/978-3-319-51482-6