Micro and Nanoelectronics Devices, Circuits and Systems

It is believed that the free radicals can harmfully influence several vital biomolecules including proteins, nucleic acids and lipids, consequently leading to various chronic diseases like cancers, neurodegenerative diseases, diabetes mellitus, respiratory diseases and cardiovascular diseases. Single-walled carbon nanotubes (SWCNTs) behave as good free radical scavengers in the front lines of theoretical models. But, literature review of ‘SWCNT as free radical scavengers’ suggests that the potentiality of SWCNTs in this field has not been investigated extensively and is yet to attain its exceeding limit. This might be due to the discrepancies existing in the theoretical models to mimic the reality. Moreover, there are experimental challenges, which necessities to be highlighted so as to permit the translation of SWCNTs into the clinic. In this review paper, we have tried to explore these discrepancies and challenges on the free radical scavenging ability of SWCNT along with some possible solutions.

The present work addresses design and analysis of a T-shaped defect-based 2D photonic crystal (PhC) to realize optical interconnect application. The proposed structure is designed in OptiFDTD simulation platform, where the finite-difference time-domain (FDTD) is the backend computational algorithm. Electric field distribution along the T-shaped waveguide is studied. The photonic band gap is analysed using plane wave expansion method, where it is seen that the signal that falls within the band gap can propagate along the defect. The power at the output ports is evaluated. A very low nonlinear coefficient in the order of 10−6 is obtained, which infers that the designed structure has enough potential as an optical interconnect in the light wave circuit.

Tunnel FETs in digital applications may replace MOSFETs because TFET offers distinguishing properties that make them suitable for digital applications, despite TFETs having a low ON-state current and slower speed than CMOS. In the proposed work, silicon-based DG-tunnel FETs for Boolean operations (AND, OR, NAND, and NOR gates) are explored. Each gate is individually biased for this purpose. Silicon body thickness and overlapping of gate-source are crucial features in the implementation of logic gates. The ON-state current of the Si-based TFET is low; therefore, the first Si-Ge-based TFET is also investigated for OR gate functionality. Compared to Si-based TFET, employing Si0.5Ge0.5-based TFET results in one order of magnitude rise in ON-state current. Atlas version of 5.0.10.R is utilized to generate simulation results. The simulation outcomes clearly illustrate that each AND, OR, NAND, and NOR gates may be realized on a single device.

In this work, we have represented a simulation study that includes the device and circuit-level performance improvements of SOI Schottky barrier (SB) MOSFETs. We have introduced the charge plasma concept instead of physical doping in our proposed SB-MOSFET. The gate work function (WF) engineering realizes the dopant segregation layers near the source and drains regions of the gate electrode. The WF near the source side charge plasma (CP) metal is optimized to improve the ION while the WF of the CP metal near the drain side is kept fixed. Dielectric engineering has been performed to minimize the leakage current. The gate dielectric (HfO2) with high-k permittivity is used on the source side to induce high gate dielectric capacitance density and that will create the electron accumulation near the source end at the channel. The length of the gate dielectric (SiO2) with low-k permittivity near the drain side is optimized to minimize the ambipolar current. The analog/RF performance parameters are investigated and compared to the conventional SOI SB-MOSFET. The simulation result indicates that there is a remarkable improvement in transconductance (58%) and cut-off frequency (87%) of the proposed dielectric engineered CP-based SOI SB-MOSFET (DE-CP-SOI-SB-MOSFET) than the SOI SB-MOSFET. Verilog-A model-based N-MOS inverters are simulated and analyzed to investigate the switching performance of two devices. It has been found that the average switching delay and the power delay product (PDP) have improved by 60 times and 36%, respectively, in the proposed DE-CP-SOI-SB-MOSFET-based inverter than the conventional SOI SB-MOSFET-based inverter.

This paper highlights the advantage of employing dual gate material in Armchair Graphene Nanoribbon (AGNR) DG Vertical Tunnel FET (DG-VTFET) to enhance the performance parameter, namely OFF simultaneously and ON-current (IOFF and ION), ION/IOFF current ratio, threshold voltage (VT), and as well optimize average subthreshold slope (SSAvg). The reported work illustrates that the appropriate selection of work function (Φ) for the tunnel and auxiliary gates at the device’s source and drain sides significantly increased the potential. In addition, to improve the device’s overall performance, high dielectric material is utilized in the oxide. The fluctuation of work function in the range of 4.0–4.8 eV has an impact on the carrier transportation due to the variation in tunneling width, considerable variation in OFF-state current, ION-to-IOFF ratio, threshold voltage (VT), as well as SS are perceived due to the work function dependence. Moreover, the performance comparisons of conventional single gate material (SMG) and proposed dual gate material (DGM) of AGNR-DG-VTFET have been carried out in this work.

Chevronic TiO2 thin film was fabricated using the Oblique Angle Deposition (OAD) methodology with the substrate at an 85° inclination to the perpendicular axis of the evaporation material. The chevronic TiO2 thin film so fabricated was analysed morphologically, structurally and optically. The Field Emission Gun-Scanning Electron Microscopy (FEG-SEM) image of the sample showed successfully grown chevronic/zig-zag TiO2 thin film nanostructure on silicon substrate of height ~ 260 nm of porous nature. The EDX mapping further confirmed the existence of titanium and oxygen in the sample. A weak peak at ~ 25° belonging to the crystal lattice of (101) of anatase TiO2 was observed from the X-Ray Diffraction (XRD) analysis of the sample. The UV–vis spectroscopy was also measured showing greater absorption in the ultraviolet (UV) region in comparison to the visible region in the absorption spectra. Moreover, slightly better absorption is shown by the chevronic TiO2 thin film sample as compared to the TiO2 thin film sample. A bandgap of ~ 3.29 eV was obtained from the Tauc Plot which is a slight variation from the near bandgap of ~ 2.93 eV corresponding to the Gaussian fitted peak of 423 nm wavelength in the photoluminescence spectra. Therefore, the fabricated chevronic TiO2 thin film using the simple OAD technique may be applicable for optoelectronic applications.

The mobility, µ of electrons shows oscillating behavior in an asymmetric GaAs/InxGa1-xAs Quantum Well (QW) Field Effect Transistor (FET) structure. So as to analyze µ, we take asymmetric doping concentrations, varying Nd1 in the substrate barrier and keeping Nd2 constant in surface barrier. The well widths W1 and W2 are also asymmetrically changed such that the sum (W1 + W2) remains constant. Resonance can be achieved for the subband energy states between the two QWs for a set of W1 and W2 by varying Nd1. A considerable variation is observed in spreading of subband wave functions near resonance that affect the subband mobilities through intersubband effects, thus causing a drop in µ. We show that dip in µ enhances by decreasing the difference in W1 and W2. The results of nonlinearity in µ can help in analyzing the characteristics of the QWFET devices near resonance.

In this chapter, a field-plated recessed gate III-nitride High Electron Mobility Transistor (HEMT) grown on β-Ga2O3 substrate is designed. The electrical characteristics of the proposed HEMT is investigated by using the thermal models of ATLAS TCAD simulations. The impact of temperature on the transport properties is studied. Influence of the substrate thickness with temperature changes on drain characteristics are also discussed. A field-plate and gate length of 20 nm each with 30 nm recessed depth is considered for the analysis. Self-heating effect in drain current characteristics are investigated with temperature changes. The maximum drain saturation current observed with 180 nm (230 nm) substrate thickness are 1.1 (1.06) A/mm, 0.708 (0.705) A/mm and 0.502 (0.499) A/mm for 300 K, 550 K and 800 K, respectively. The influence of substrate layer thickness on drain current is less apparent at a higher temperature. The findings demonstrated that scattering processes that emerge when temperature increases above a particular amount cause both the mobility and the carrier concentration of 2DEG to decrease. Furthermore, A kink effect is seen in the drain current–voltage characteristics for gate voltage VGS = − 2 V.

In this chapter, the evolution of high-speed devices for high performance and power used in several applications has been introduced. To design, characterize and fabricate the such type of devices, the elemental semiconducting materials used in the modelling of conventional devices like MOSFETs and MESFETs have been replaced by compound semiconducting materials (Group III–V) like AlGaAs, AlGaN, InP AlInAs are used to form heterojunctions. These heterojunctions are formed by two dissimilar semiconducting materials, one with a narrow bandgap and the other is a wide bandgap. The performance of these devices are compared. The most important parameter to be considered to form heterostructures is the lattice constant; heterojunctions are formed with materials that have good lattice matches to progress the performance of the devices. The various applications of these high-speed devices are also presented in this chapter, also the similarities between the buried channel MOSFET and the HEMT have been compared, few parameters like ON resistance, and temperature-dependent characteristics of both MOSFET and HEMT were analysed.

Graphene, the wonder material, consists of a single-atom thick layer of SP2-hybridized carbon atoms arranged in a hexagonal honeycomb structure. It became popular mainly due to its ideally zero band gap and ultra high electron mobility. To make graphene more functional in the domain of device design, it is essential to create a certain amount of band gap, which can be realized by following different techniques like width modulation, chemical doping, field gating, etc. In this chapter, we adopt some existing techniques to study modulation of bandgap in two-dimensional and one-dimensional nanoribbon (GNRs) form with its arm chair and zigzag ribbon edges (known as AGNR and ZNRs). The band energy has been calculated numerically employing tight-binding model. Moreover, band gaps of GNRs are studied for different sets of ribbon width, and energy bands are obtained using an open-source python-based simulation tool “KWANT”. For AGNR, a decrease in width enhances the band gap, while for ZNR, it is pinned at zero, for all width configurations. The study also includes the behavior of the energy diagram of GNRs for different biasing voltages. Shifting of energy levels to higher and lower values with the application of positive and negative voltage is observed, by maintaining the same band gap.

In this work, an attempt has been made to fabricate a copper oxide thin film (TF) on both fluorine-doped tin oxide (FTO) glass substrate and a p-type Si substrate by simple E-beam evaporation techniques. To study the effect of annealing on the structure, morphology and optical properties of copper oxide-TF, the fabricated sample was annealed at 400 and 500 °C. The as-deposited copper oxide-TF/FTO sample shows the cuprous oxide (Cu2O) phase at ~ 42.84°, which corresponds to the crystal lattice plane (200) which is evidenced by the X-ray diffraction (XRD) analysis. Furthermore, annealing induced a phase transition in copper oxide-TF, resulting in two distinct peaks at ~ 34.98° and ~ 38.14°, which match the (11–1) and (200) CuO crystal planes. Again, optical properties of as-deposited copper oxide-TF/FTO indicate higher absorption in the near IR region. However, absorption intensity decreases in both the IR and visible range after annealing. Also, the optical bandgap of annealed copper oxide-TF/FTO decreases to ~ 2.26 eV which is determined from the Tauc Plot. Therefore, the proposed simple E-beam evaporation technique can be employed for the growth of good quality copper oxide film which may be used for various optoelectronic applications.

Power consumption is a critical challenge for scaling driven performance improvement of modern energy efficient integrated circuits (IC) technology. The power dissipation in conventional field effect transistors is constrained by the Boltzmann’s Tyranny, i.e., at least 60 mV gate voltage is required to switch the transistor by one decade of drain current at 300 K. Tunnel field-effect transistors (TFET) is an exceptional candidate as energy efficient switch in comparison to traditional field-effect transistors due to quantum tunneling principle that can enable the further scaling of IC technology and achieve sub-threshold swing ( $$S$$ S ) < 60 mV/dec and supply voltage < 0.6 V. Additionally, TFET devices illustrate greater invulnerability toward the short channel effects and low power dissipation. This article provides a detailed insight on the recent progress, challenges, and future perspectives of TFET technology based on various theoretically and experimentally demonstrated devices.

In this paper, a design and analysis of dual-gate zinc oxide nanostructured thin-film transistors (DG ZnO TFTs) are presented that outperform traditional top-gate (TG) and bottom-gate (BG) ZnO TFTs. TFTs using dual-gate (DG) technology have two conduction channels at each interface (top and bottom) to enhance gate electric fields and effective channel conduction. The capacitive coupling between the top- and bottom-gate dielectrics in the DG ZnO TFTs significantly enhances the surface potential, electric field, and mobility. The DG ZnO TFT exhibits a high drive-ON current (ION) of 11.23 mA and a steeper subthreshold swing of 64 mV/dec. The ION of the DG ZnO TFT is 58% higher than the sum of the ION of the TG and BG ZnO TFTs. We also investigated the impact of channel thickness and dielectric constant of the gate oxide on the electrical performance of the proposed device. The ION increases with the decrease of channel thickness and improves with the high dielectric constant of the oxide. When the ZnO channel thickness is 10 nm, and the dielectric is TiO2, the proposed device exhibits a higher ON current of 178.14 mA.

In this paper, we present a normally-off beta-gallium oxide (β-Ga2O3) metal–oxide–semiconductor field-effect transistor (MOSFET) with ferroelectric gate (Fe-G). The enhancement-mode (E-Mode) operations are achieved by depleting the charge carriers from the channel using the gate charge trapped in the ferroelectric material at the ferroelectric–dielectric (Fe-De) interface. The enhancement-mode (E-mode) operation has a negligible degradation in saturation current as compared to depletion-mode (D-Mode) operation. Ohmic-contacts access region resistances are minimized in the E-mode using highly-doped ohmic-contacts access regions. Furthermore, device achieves a significant low specific on-resistance (RON,sp) of 48 mΩ-cm2 in E-mode compared to 103 mΩ-cm2 in the D-mode. Furthermore, a high breakdown voltage (VBR) of 2250 V in E-mode combined with RON,sp brings in a figure of merit (VBR2/RON,sp) of 49 MW/cm2, showing its potential for futuristic wide bandgap (WBG) power devices. In addition, the E-mode device shows a hysteresis-free subthreshold swing (SS) of 65 mV/dec, which indicates its suitability for fast switching applications.

Although ternary content-addressable memories (TCAMs) are faster in operation than static random access memories (SRAMs), TCAMs have disadvantages like high power consumption, low bit density, high cost, and complex circuitry. This paper presents a novel approach to adding SRAM advantages to TCAMs using the technique of hybrid partitioning. In hybrid partitioning, the TCAM table is divided both horizontally and vertically. These partitioned blocks are directly mapped to their corresponding SRAM cells. To justify the functionality and performance of the design, a 64 × 32 SRAM-based efficient TCAM is successfully designed on Xilinx Field-Programmable Gate Array (FPGA) using Verilog HDL. Design parameters were improved in all corners like speed by 10.52%, power by 7.62%, and resource utilization by 50% compared to the best performance reported in literature. And also application-specific integrated circuit (ASIC) of the architecture is designed on the 45-nm CMOS technology node to check the feasibility of design on the chip, and similar to FPGA-based architecture, ASIC implementation performance is also improved.

In this current age of automation, vending machine is used to sell products in order to save human efforts and time. It is high time to recycle the waste products to make the world more eco-friendly. This project is intended to design a vending machine that offers products to customers and accepts specific waste products from customers to recycle. This vending machine offers products such as newspaper, journal and magazine and accepts the old or waste products (if any) such as old newspaper, journal and magazine and offers discounts if the customer deposits any old or waste product. The proposed vending machine accepts two coins, i.e. Rs. 5 and Rs. 10, and offers Rs. 5 discount in the same purchase. The intended vending machine has been designed and coded in Xilinx ISE V 14.7 using Verilog HDL language to get desired output. We have designed the vending machine more power efficient. XPower Analyser is used for the analysis of power.

Over analog communication, digital communication is given more importance. In our daily lives, communication is essential. Typical approaches are required to transmit information more securely from one to another. As technology advances, the cost of an IC decreases steadily, and as a result, chips are constructed using systems like SOC. By using a cell-based approach similar to IP core cell-based design, a QPSK modulator which includes a digital multiplier called as a Booth’s multiplier has been created. The device is developed in Xilinx Vivado 16.2 with the aid of an IP integrator. After being packaged as an IP, this modulator is frequently reused in different communication system designs without having to recreate and execute the simulation of the HDL code. The modulator’s performance study was based on the notion of an essential constant drawback, such as cell size.

A high-resolution analog-to-digital converter (ADC) is presented in this paper for application in sensor signal conditioning circuits. Based on the requirements of low complexity, low speed of operation, and moderate resolution, successive approximation register (SAR) ADC is most suitable. All the sub-circuits, i.e. comparator, sample and hold (with bootstrapped switching technique), SAR logic, and differential charge scaling digital-to-analog converter (DAC) circuits are designed, simulated, and verified using Cadence Virtuoso with SCL 180 nm PDK. The proposed design achieved 1.1 MS/s for 12-bit resolution with SDNR and ENOB of 73.54 dB and 11.92 bits, respectively.

Laser-induced synthesis of graphene (LIG) offers advantages of being environmental benign, scalable and highly customizable. Furthermore, graphene obtained via this methodology possess edge defects, oxygen functionalities and subsequently contain sufficient density of electronic states and are advantageous for electroanalytical applications. However, CO2 laser possess large absorption energy and results in significant heating of the underlying substrate. Despite these limitations, the scientific literature for LIG is replete with works based on CO2 laser. On the other hand, blue laser (405 nm) anchors graphene production via both the photothermal and photochemical effects and minimizes the problem associated with overheating of substrates. However, only few works based on blue LIG have been reported. Considering these advantages and the dearth in blue LIG works, we fabricated LIG at a particular laser setting and investigated its structural properties. The XRD and Raman spectroscopy (ID/IG ~ 0.9) results revealed graphene formation with excellent crystallinity (98%) and sp2 hybridization characteristics thus vindicating the fabrication parameters. The SEM images revealed 3D porous structures, which has been reported by many other groups also. The electroanalytical performance was evaluated using outer sphere redox molecule, ferricyanide on a disc shaped 3-electrode system containing quasi silver reference electrode. Future works shall involve electrode design optimization on the optimized fabrication/lasing parameters to improve the electroanalytical performance of electrodes.

This study reports the implementation of a hybrid CMOS-based 1-bit full adder (FA) circuit. The need for noise robustness, better drivability and low-energy operation for deep submicron encourage the examination of the hybrid design style. Hybrid CMOS design techniques are utilized to propose new full-featured adders with the desired performance. Module I (XOR-XNOR) generates the XOR-XNOR output simultaneously. Module II and Module III are implemented using the PTL and TG logic. In this work, 16 nm FinFET technology is used to implement a novel design of hybrid FA. The proposed design shows 29.37–71.90% and 38.96–81.56% improvement in power consumption and PDP, respectively.

Buses are the backbone of public transportation in urban India. The existing physical ticketing process is slow, unreliable, and inconvenient. This paper introduced a ticketing system that allows a seamless ticketing experience for the passenger. Passengers will be able to choose their desired destination and ticket count. We introduced a feature where students and senior citizens can claim their rebates as per the government-set reimbursement on bus fares. The module has been designed and synthesized with Xilinx Vivado ISE using Verilog Hardware Description Language (HDL). The ticket generation, coin, and change processing section uses Moore finite state machine (FSM), which allows simplicity in the designing process. A total power consumption of 27.34 mW and 6.134 ns delay at a maximum clock frequency of 130 MHz has been estimated for the proposed design. The RTL schematic and process simulation of the functional system has shown in this paper. The simulation has been carried out using ISim wave-view software.

Vernier technique for time interval measurement between two events has gained attention due to its features of high resolution, large dynamic range and area efficiency. This paper presents negative time interval measurement between 'start' and 'stop' events using Vernier technique as its novel feature. Utilizing this feature, a CMOS standard cell-based TDC channel is designed, suitable for both positive and negative time interval measurements between ‘start’ and ‘multi-hit stop’ signal. This TDC channel measures timing of four hits comprised in multi-hit signal with respect to start with LSB of 98 ps over 14 µs dynamic range, 1 ns of double hit resolution, 0.3 LSB DNL error and 0.5 LSB INL error on typical process corner using 0.35 µm CMOS technology.

With the advancement of modern technology, utilizing deep learning in bio-medical applications has become predominant. Deep learning-based classifiers are coming into the picture these days as an important automatic disease detection method. This study shows the implementation of the convolutional neural network (CNN) model for dysphonia disease detection on Xilinx zynq-7000 FPGA board using hardware description language, i.e., Verilog. Dysphonia refers to voice disorder, which causes degradation of voice quality slowly with time. Some patients even lose their voices for a certain period. Earlier detection of any disease is important to take necessary precautions. This our work aims to identify the disease at its early stages to reduce its severity caused by it. The CNN algorithm has been designed, trained, and validated on MATLAB with a dysphonia dataset which has been taken from the Saarbruecken voice database. For this study, 88 dysphonic and 72 healthy voice samples of males and females are considered. The MATLAB pre-trained model is further used to extract weights and biases to implement the CNN model on hardware. The FPGA implementation has improved the performance and speed of image classification when compared with the CNN model on MATLAB. We obtained training and validation accuracy of 83.12% and 76.89%, respectively, using MATLAB deep network designer, while in the case of FPGA, implementation better efficiency and accuracy are obtained.

The primary purpose of this research is to investigate and evaluate the effectiveness of a 4 × 4 squarer circuit based on Vedic mathematics and reversible logic gates. A high-speed squarer circuit has been developed using Fredkin, Peres, BME, and HNG gates. The simulations are performed using the iSim simulator in Xilinx ISE 14.7. In addition, using several FPGA models, the delay, a fundamental aspect of a digital circuit, is also explored. The individual blocks of the existing circuits are implemented using different types of available reversible logic gates. Lastly, a comparison of the proposed circuit's different attributes with those of the existing designs such as gate count, the proportion of ancilla inputs, and garbage outputs and quantum cost are calculated and presented in a tabular form. Along with this, a brief comparison of FPGA hardware utilized and power consumed is also given. Finally, it is noted that as the quantum cost is greatly decreased by around 75%, also the delay is improved compared to the existing designs by 2.7%, and hence the proposed circuit becomes a viable candidate for high-speed applications.

Biomedical devices have enormous possibilities in health applications. A low-noise amplifier (LNA) is a crucial circuit in neural recording, ECG, and EEG systems. The performance of LNAs has to vary with the characteristics of their different components. This contribution presents an empirical comparison between the latest state-of-the-art LNAs in health applications. Using the specter tool of MOS technology, LNAs have implemented at 180, 90, and 65 nm and simulated at a wide supply voltage (1–1.8 V) range. There are 99.9% power variation, 103.7% bandwidth range, 93.18% gain range, 91.17% noise figure vary, and IIP3 97.5% area variation for different LNA designs. Different LNAs have used in analog front end (AFE) design/circuits. A comparison of AFE designs has shown that there are 85.07% power saving, 79.78% maximal bandwidth, and 93.54% best performance.

In today’s scenario, we can notice that memory takes up more than 85% of the available chip space. For all integrated devices from computers to various handheld devices, there is high requirement of faster and low power-consuming memory systems. Till today, all the memory devices such as SRAM and DRAM are mostly using the traditional MOSFETs. As the MOSFET-based memory devices provides the required performance but to further shrink the size of the transistor and to get better power-related outcomes and delay, we have a novel design called FinFET. In order to reduce the short channel effects and to get the acceptable gate control over the channel, FinFET technology can be the better option. In this paper, the design of conventional 6T SRAM cell is done using both MOSFET at 45 nm and FinFET at 14 nm technology nodes in Symica DE tool. The comparison of those designs is made in terms of power consumption and delay parameters. The simulation results demonstrate that FinFET-based SRAM cell offers better performance with less power consumption and delay. Along with the conventional design, SRAM cell is designed under sleep transistor, forced stack, DTMOS, and VTMOS techniques individually and with combinations like DTMOS–sleep transistor, DTMOS–forced stack, VTMOS–sleep transistor, and VTMOS–forced stack with FinFET technology. The simulation results indicate that the sleep-transistor-driven SRAM cell yields best performance in terms of power consumption. Furthermore, the DTMOS using sleep-transistor-based SRAM cell provides less delay compared to other designing techniques.

This paper provides an in-depth analysis of the different conventional and non-conventional design methods utilized for XOR/XNOR cells, which serve as the fundamental circuit for many high computational arithmetic logic circuits in low-voltage low-power VLSI designs. The ultimate goal of any researcher is to optimize the circuit performance in order to decrease the power consumption of the circuit while maintaining minimum area requirement and higher speed. In this work, challenges of conventional and non-conventional design methodologies have been discussed. A comparative analysis of various XOR/XNOR cells that are available in the literature has also been done. In this research, it is found that if carbon nanotube field effect transistor (CNTFET) technology is used at lower technology node, the circuit’s performance increases in term of speed while floating gate metal oxide semiconductor (FGMOS) technology shows better performance in term of power consumption. FinFET technology is also discussed in this treatise. Unavailability of appropriate simulation model and the complex fabrication process are the major challenges for the non-conventional technologies.

Brain–machine interface (BMI)-based neural signal recording is a new approach that is frequently used to track brain activity. Neural signals are recorded using microelectrode implanted in the brain. The collected signal from the electrode has a low amplitude and a high noise level. It requires a high-performance neural amplifier system that has highly immune to noise and with high gain for recording neural local field potential (LFP) and action potential (AP) signals. Integrated circuit (IC) technology can be used to develop and construct neural amplifier-based systems internally, leading to ultra-large-scale integration (ULSI) or application-specific integrated circuit (ASIC) solutions. Due to its small form factor and lightweight with low power consumption, the IC-based neural amplifiers are now deployed in portable easy to carry neural recording system. In this paper, the review will focus on various neural amplifiers design topology and operational transconductance amplifier (OTA) architecture and their pros and cons based on their performance in terms of noise efficiency and power consumption.

In this work, a conventional DG-MOSFET is implemented and its mechanism is investigated by Silvaco TCAD Atlas. The prime objective of this manuscript is to understand the working operation and design and its related performance based on higher temperature stability. To investigate the degree of short-channel effects, the natural length must be specified due to different essential parameters like threshold voltage, Off current, and subthreshold slope rely on it. As the results obtained for GaAs is superior to that of silicon and the findings in this manuscript can give new insight into DG-MOSFETs in terms of electrical parameters which in turn results in better real time applications and advancements in technology. In this manuscript, we have investigated analog performance in terms of drain current obtained for GaAs which is thrice to that of silicon and the effect of temperature of Double-gate MOSFETs. From the results section it can be concluded that as there is enhancement in electrical parameters obtained which are acting as an essential parameters for sensitivity that can be made applicable for various biosensing applications.

In this paper, a sensitivity-improved on-chip temperature sensor is designed and demonstrated for heavy workload and fast processors. The temperature sensor is based on a self-stabilized inverse-Widlar architecture, which utilizes the concept that in a small temperature zone, threshold voltage varies linearly with temperature. The circuit was designed, simulated, and validated using Cadence in SCL 180 nm CMOS technology. The designed temperature sensor exhibits higher sensitivity of 1.81 mV/ °C and integral nonlinearity (INL) of ± 1 °C in the temperature range of -20 °C to 100 °C. Also the higher sensitivity of sensors will utilize lower bit ADC for operation, saving on-chip area and can be used efficiently for thermal guardbanding in fast processors.

The ambitious expectations of 5G/6G paradigms in terms of data rates rely on the ubiquitous coverage offered by various kinds of cells, adopting antenna arrays in massive multiple-input-multiple-output (mMIMO) configuration, and operating at high frequencies. The revolutionary choice of mMIMO systems unleash the potential of beamforming (BF) techniques, performed by hybrid digital-analog architectures, in which components like radio frequency micro-electromechanical-systems (RF-MEMS) attenuators could be an effective building block for such high-performance antenna systems employed in different kinds of cells. In this work, starting from a basic 1-bit attenuation module, different versions are optimized and simulated to be successively combined into a single compound. The development of -1 dB, -2 dB, -3 dB, and -4 dB single modules permits to achieve a compact and modular arrangement with a maximum -10 dB attenuation by -1 dB steps, operating in the 24.25 - 27.5 GHz range, the 5G frequency band to be employed in European countries. The use case is the one of Femtocells, in which the reduced number of users does not require extensive BF capabilities.

In this work, the open circuit voltage (Voc), short circuit current (Isc), maximum power (Pmax), and internal resistance (Rin) have been studied separately for ginger, pumpkin, balsam, potato, jute leaves, and onion extracts electrochemical cells for 80 h. Then after it has been studied, the open circuit voltage (Voc), short circuit current (Isc), maximum power (Pmax), and internal resistance (Rin) have been studied together for hybrid ginger, pumpkin, balsam, potato, jute leaves, and onion extracts electrochemical cells for 80 h. A comparative work has been studied among the ginger, pumpkin, balsam, potato, jute leaves, and onion extracts electrochemical cells. It is shown the variation of open circuit voltage (Voc), short circuit current (Isc), maximum power (Pmax), and internal resistance (Rin) for hybrid ginger, pumpkin, balsam, potato, jute leaves, and onion extract electrochemical cell with the variation of TD (hrs) together and separately. It is found that the result for together is good than the separated conditions. It is shown that the open circuit voltage is almost constant of ginger extract electrochemical cell for 80 h. The short circuit current decreases slowly for 80 h. The maximum power decreases linearly for 80 h. The internal resistance is almost constant for 80 h.

Future broad application paradigms like beyond-5G (B5G), 6G and super-Internet of things (IoT) will bring significant disruption in all the segments of the physical infrastructure ensuring such services, from the core (cloud) to the edge of the network. Substantial rearchitecting will be necessary to allow proper functioning of a highly-diversified space-air-ground-sea physical infrastructure, along with operation at frequency ranges spanning from sub-GHz, to millimeter-waves (mm-Waves), again to sub-THz (100–300 GHz) and above. In this work, we focus on the radio frequency (RF) portion of the infrastructure, and in particular on micro-relays for channel commuting and reconfiguration of passive elements. To this end, we report on high-performance and highly-miniaturized micro-switches based on microelectromechanical-systems (MEMS) technology, known as RF-MEMS. A few different design concepts of RF-MEMS-based series ohmic switches are reported, discussed and compared, with the support of finite element method (FEM) modeling and RF experimental characterization up to 110 GHz.

This study investigates pH sensing using an ion sensitive field effect transistor (ISFET) built from the nanomaterial zinc oxide (ZnO) and using a thin film transistor (TFT) design. The device shows an excellent Ion/Ioff ratio > 106 for low-power applications with high transconductance (gm = 0.342 mS/µm), representing the available surface area for detecting hydrogen ions (H+). The device has a variety of figures of merit (FoMs), including average sensitivity (current & voltage) and signal-to-noise ratio (SNR). One type of sensing metric is the variation in threshold voltage. The impact of pH on different parameters (potential, drain current, transconductance) is analyzed. The simulated device’s sensitivity response is near the Nernestian limit of 59 mV/pH. The planned device shows good stability and sensitivity for sensing pH values during simulation.

There are different types of skin cancer, but the most dangerous and aggressive is the malignant melanoma (MM), because it can be easily metastasized and reaches vital organs. The survival rates for this kind of pathology are very low if it reaches the lymph nodes or other organs. The survival rate becomes considerably high if it is early detected. Therefore, a diagnostic tool able to early detect the malignant melanoma at its early stage is fundamental to save lives. The goal of this work is to develop a wearable small sensor able to detect the small changes of the electric characteristic of the skin due to the early outbreak of the malignant pathology by using miniaturized modulated scattering technique (MST) sensors. They can be easily miniaturized since they do not need a radio-frequency section. They are simply realized with a small scattering antenna, a set of loads, and an electronic switch. To improve the probe performances, the use of an efficient switch is mandatory, and a micro-switch realized in micro-electromechanical systems (MEMS) technology has been used to reach this objective. In particular, the proposed MST sensor probe is able to detect and retransmit the information related to the dielectric permittivity of the skin and consequently provide useful diagnostic information mandatory to early identify the presence of malignant tissue. The preliminary results are quite promising and confirm that the wearable MST probe could be an important diagnostic tool able to save life or improve the survival rate and the life quality of patients.

Cross axis sensitivity occurs because of the 3-dimensional effect of the sensor geometry and it is one of the most critical issue in MEMS design. In this paper, the cross axis sensitivity is minimized first by change in sensor geometry and second by using a Wheatstone bridge. The sensor geometry is proposed with necessary aspect ratio approximation so that the cross axis sensitivity in both the off-axes can be reduced simultaneously. The proposed scheme is designed for $$\pm$$ ± 6 g and has a z axis deflection of 2.59 × 10−7 m. The cross axis sensitivity for aspect ratio of 1:1 is 4.49 μm2/rad and 2.5 μm2/rad along X direction and Y direction respectively. The approximation of the aspect ratio to 1.4:1 minimizes the cross axis sensitivity and giving a value of around 3.5 μm2/rad in both the off-axes. Thus, the aspect ratio approximation corresponds to low and equal off-axes sensitivities. For high-performance applications, further elimination of the off-axis sensitivity is done with the help of Wheatstone bridge circuit.

Spinel ferrite nanoparticles (NPs) are potential candidates due to their tremendous electrical and magnetic properties. Here, magnetic and physical features of stoichiometry Mg0.6-xCoxZn0.4(Fe1.5Cr0.5)O4 ferrite NPs have been studied where different cobalt content was used. The average particle size was calculated at 4–6 nm. NPs were probed by X-ray diffraction (XRD), vibrating sample magnetometer (VSM), and FT-IR spectroscopy. The molecular vibration band at 560 cm−1 is accounted for the metal–oxygen bond stretching at the tetrahedral site of NPs. The crystal structure of NPs was confirmed by XRD analysis. The magnetic parameters have been decreased for the cobalt content x = 0.2 on ferrite NPs which further increased on replacing magnesium ions with nonmagnetic cobalt ions for higher cobalt concentrations. Moreover, high saturation magnetization and coercivity were observed at 52.29 emu/g and 212 Oe for 0.00 and 0.6 cobalt contents, respectively, on ferrite NPs. In this study, sol–gel method provides an easy synthesis process of Co-doped ferrite nanoparticles at low temperature.

The rising demand for electricity is becoming a tread throughout the world. In this study, a modified Zn/Cu electrodes-based bio-electrochemical cell (BEC) has been developed by using the ginger extract electrolyte and silver nanoparticles (Ag NPs). The effect of Ag NPs on the open circuit voltage (V), short circuit current (I), maximum power (P), power density (Pd), and internal resistance (R) of the BEC has been examined. Here, Ag NPs were formed via a rapid, non-toxic green synthesis process by using the ginger extract reducing agent. The functional groups in the ginger extract play an important role in reducing the Ag NPs from the Ag ions. The formation of Ag NPs was probed by X-ray diffraction spectroscopy (XRD) and UV–visible spectroscopy, and the active functional groups presented in the plant extract have been identified by using the Fourier transform infrared (FT-IR) analysis. The Ag NPs were incorporated in BEC to integrate the power and power density of cell. Such a modified Zn/Cu-based BEC can take the frontier forward for the integration of nanotechnology in low-cost electricity generation.

Nanohybrids have potential to cover all the requirements of developing technological trends while being ecologically friendly. This article describes a two-step synthesis method to create a hybrid system using Mn-Co nanoferrite and polyvinyl alcohol (PVA). The Mn-Co nanoferrite was prepared by the chemical method and calcined at 600 °C. Structural and morphological analysis indicates the formation of spinel cubic single-phase and nanoferrites intercalated in the PVA matrix by X-ray Diffraction (XRD) and Field-Emission Scanning Electron Microscopy (FESEM) respectively. The optical bandgap was found to be 4.14 eV by UV-Visible spectroscopy, and the Fourier Transfrom Infrared Spectrsocopy (FTIR) exhibits presence of all organic functional groups suggests the formation of nanohybrids. As-prepared nanoferrites incorporated in a PVA matrix are used to fabricate the device by solution-processed method for Liquefied Petroleum Gas (LPG) Detection. The adsorption and desorption of the gas on the surface of the film determine the sensing performance of the nanohybrid based device. The sensor response of the device was discovered to be 41%, and rise/decay time of one cycle was discovered to be 7.1/6.9 s at 0.5 vol % of LPG exposure. The prepared sample exhibits excellent qualities at significant lower concentration of the targeted gas and demonstrated the highly stable nature.

Additive manufacturing processes have shown the potential to fulfil the growing demand for developing low-cost, miniaturized biosensing platforms with high precision and accuracy. In this work, a 3D printed cathode shared closed bipolar electrode eight-well electrochemiluminescence platform is developed for performing multiplexed sensing of various analytes with different concentration ranges simultaneously. The most common luminophore derivatives, ruthenium and luminol, for cellular analysis were explored for multiplex sensing in the same platform. In Luminol/H2O2-based sensing, the varying concentration of H2O2 has shown a linear range from 0.1 to 10 mM with a limit of detection (LOD: 0.1 mM). Similarly, in Ru(bpy)32+/TPrA sensing, the varying concentration of Ru(bpy)32+ has shown a linear range from 100 to 700 µM with a limit of detection (LOD: 30 µM). The proposed device may perform multiplex sensing based on ruthenium and luminol for biological samples.

MEMS technology can be incorporated into a wide variety of electronic components. Sensors are the dominant application of MEMS techniques; there are widely used MEMS accelerometer, gyroscope, inclinometers, flow sensors, gas sensors, pressure sensors and magnetic field sensors. Most of the sensors are based on cantilever principle. This paper presents the case study of fabrication of a MEMS cantilever with detailed process flow. A p-type silicon on insulator of 100 orientation with thickness of 3 inches was chosen. The fabrication of the device was done using the clean room facility of class 100 in the INUP Centre in IISC Bangalore. The chemical vapour deposition (LPCVD) was done where the thickness of nitride was chosen as 250 nm. The device went through the different fabrication process steps and finally after etching, the device was released and characterization was done. The device fabrication facility was sponsored by the INUP Centre of IISC, India.

In this work, the effect of temperature on a single quarter-wave phase-shifted Bragg grating modulator is investigated in detail. The improved modulation performance in terms of tunability of the proposed modulator due to temperature is presented here successfully. It is shown that 1 nm wavelength can be shifted by applying −3.0 V reverse bias voltage with 10° temperature enhancement using the modulator. So, high-speed modulation up to 100 GHz can be achieved.