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Microsystem Technologies

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28-11-2019 | Technical Paper

Suppression of buried oxide induced variability on digital performance of GeOI pMOSFETs using substrate bias scheme

Authors: Jayanti Paul, Chandrima Mondal, Abhijit Biswas

Published in: Microsystem Technologies | Issue 5/2020

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Abstract

Random variation in buried oxide thickness strongly affects the digital performance of ultra-thin body germanium-on-insulator MOSFETs. Dependencies of threshold voltage, ON-current, OFF-current and subthreshold slope of ultra-thin body germanium-on-insulator MOSFETs on three different BOX dielectrics are examined by employing well-calibrated Synopsys TCAD. The variation of threshold voltage and ON-current becomes less sensitive with high-k BOX dielectrics whereas smaller variation of OFF-current is observed for the device with low-k BOX dielectrics. The subthreshold slope remains almost unaltered for all BOX dielectrics. Furthermore, a positive substrate bias is found to suppress variability of digital performance parameters of GeOI p-MOSFETs.

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Abe S, Miyazawa Y, Nakajima Y, Hanajiri T, Toyabe T, Sugano T (2009) Suppression of DIBL in deca-nano SOI MOSFETs by controlling permittivity and thickness of BOX layers. In: Proceedings of the 10th International Conference on Ultimate Integration on Silicon, IEEE, Aachen, Germany, 18–20 Mar 2009

Asenov A, Kaya S, Davies JH, Saini S (2000) Oxide thickness variation induced threshold voltage fluctuations in decanano MOSFETs: a 3D density gradient simulation study. Superlattices Microstruct 28(5/6):507–515CrossRef

Ernst T, Tinella C, Raynaud C, Cristoloveanu S (2002) Fringing fields in sub-0.1 µm fully depleted SOI MOSFETs: optimization of the device architecture. Solid-State Electron 46:373–378CrossRef

Hellings G, Eneman G, Krom R, Jaeger BD, Mitard J, Keersgieter AD, Hoffmann T, Meuris M, Meyer KD (2010) Electrical TCAD simulations of a germanium pMOSFET technology. IEEE Trans Electron Devices 57(10):2539–2546CrossRef

Hutin L, Royer CL, Damlencourt J-F, Hartmann J-M, Grampeix H, Mazzocchi V, Tabone C, Previtali B, Pouydebasque A, Vinet M, Faynot O (2010) GeOI pMOSFETs scaled down to 30-nm gate length with record off-state current. IEEE Electron Device Lett 31(3):234–236CrossRef

International Technology Roadmap for Semiconductors (2013) Process Integration, and Devices and Structures. Semiconductor Industry Association. http://www.itrs2.net

Koh R (1999) Buried layer engineering to reduce the drain induced barrier lowering of sub-0.05 µm SOI MOSFET. Jpn J Appl Phys 38:2294–2299CrossRef

Logeeswaran VJ et al (2009) Ultrasmooth silver thin films deposited with a germanium nucleation layer. Nano Lett 9(1):178–182CrossRef

Magnone P, Crupi F, Alioto M, Kaczer B, Jaeger BD (2011) Understanding the potential and the limits of germanium pMOSFETs for VLSI circuits from experimental measurements. IEEE Trans VLSI Syst 19(9):1569–1582CrossRef

Matsukawa T et al. (2014) Influence of work function variation of metal gates on fluctuation of sub-threshold drain current for fin field-effect transistors with undoped channels. Jpn J Appl Phys 53:04EC11-1-5

Mazurier J et al. (2011) Drain current variability and MOSFET parameters correlations in planar FDSOI technology. In: Proceedings of International Electron Devices Meeting, IEEE, Washington, DC, USA, 5–7 Dec 2011

Mezzomo CM, Bajolet A, Cathignol A, Ghibaudo G (2011) Drain-current variability in 45 nm bulk N-MOSFET with and without pocket-implants. Solid-State Electron 65(66):163–169CrossRef

Mitard et al. (2009) Record I_ON/I_OFF performance for 65 nm Ge pMOSFET and novel Si passivation scheme for improved EOT scalability. In: Proceedings of International Electron Devices Meeting, p 1

Ohtou T, Saraya T, Hiramoto T (2008) Variable-body-factor SOI MOSFET with ultrathin buried oxide for adaptive threshold voltage and leakage control. IEEE Trans Electron Dev 55(1):740–742CrossRef

Paul J, Mondal C, Biswas A (2018a) Studies of buried oxide properties on nanoscale GeOI pMOSFETs for design of a high performance common source amplifier. Mater Sci Semicond Process 80:85–92CrossRef

Paul J, Mondal C, Biswas A (2018b) Enhancing digital performance of nanoscale GeOI MOSFETs through optimization of buried oxide properties and channel thickness. Microsyst Technol. https://doi.org/10.1007/s00542-018-4113-x CrossRef

Pillarisetty et al. (2010) High mobility strained germanium quantum well field effect transistor as the p-channel device option for low power (Vcc = 0.5 V) III–V CMOS architecture. In: Proceedings of International Electron Devices Meeting, p 150

Roy G, Brown AR, Lema FA, Roy S, Asenov A (2006) Simulation Study of Individual and Combined Sources of Intrinsic Parameter Fluctuations in Conventional Nano-MOSFETs. IEEE Trans Electron Dev 53(12):3063–3070CrossRef

Sayed KE, Lyumkis E, Wettstein A (2012) Modeling statistical variability with the impedance field method. In: Proceedings of International Conference on Simulation of Semiconductor Processes And Devices, p 205

Sentaurus Device User Guide (2016) Synopsys

Trivedi VP, Fossum JG (2005) Nanoscale FD/SOI CMOS: thick or thin BOX? IEEE Electron Device Lett 26(1):26–28CrossRef

Tsutsui G, Saitoh M, Nagumo T, Hiramoto T (2005) Impact of SOI thickness fluctuation on threshold voltage variation in ultra-thin body SOI MOSFETs. IEEE Trans Nanotechnol 4(3):369–373CrossRef

Van der Steen J-LPJ, Esseni D, Palestri P, Selmi L, Hueting RJE (2007) Validity of the parabolic effective mass approximation in silicon and germanium n-MOSFETs with different crystal orientations. IEEE Trans Electron Dev 54(8):1843–1851CrossRef

Veerappan M et al (2017) Fabrication of high quality, thin Ge-oninsulator layers by direct wafer-bonding for nanostructured thermoelectric devices. Semicond Sci Technol 32(035021):1–10

Wang RS et al (2013) Impacts of short-channel effects on the random threshold voltage variation in nanoscale transistors. Sci China Inf Sci 56(062403):1–7

Wang X, Xiang J, Han K, Wang S, Luo J, Zhao C, Ye T, Radamson HH, Simoen E, Wang W (2017) Physically based evaluation of effect of buried oxide. IEEE Trans Electron Devices 64(6):2611–2616CrossRef

Yang Y, Du G, Han R, Liu X (2010) Variability in nano-scale intrinsic silicon-on- thin-box MOSFETs (SOTB MOSFETs). In: Proceedings of International Conference on Simulation of Semiconductor Processes And Devices, IEEE, Bologna, Italy, 6–8 Sept 2010

Yang Y et al (2013) Back-gate bias dependence of the statistical variability of FDSOI MOSFETs With thin BOX. IEEE Trans Electron Dev 60(2):739–745CrossRef

Yu H-Y, Park J-H, Okyay AK, Saraswat KC (2012) Selective-area high-quality germanium growth for monolithic integrated optoelectronics. IEEE Electron Device Lett 33(4):579–581CrossRef

Yu X, Kang J, Takenaka M, Takagi S (2017) Evaluation of mobility degradation factors and performance improvement of ultrathin-body Germanium-on-Insulator MOSFETs by GOI thinning using plasma oxidation. IEEE Trans Electron Devices 64(4):1418–1425CrossRef

Zhang R, Huang P, Lin J, Taoka N, Takenaka M, Takagi S (2013) High-mobility Ge p- and n-MOSFETs With 0.7-nm EOT using HfO₂/Al₂O₃/GeO_x/Ge gate stacks fabricated by plasma postoxidation. IEEE Trans Electron Devices 60(3):927–934CrossRef

Title: Suppression of buried oxide induced variability on digital performance of GeOI pMOSFETs using substrate bias scheme
Authors: Jayanti Paul
Chandrima Mondal
Abhijit Biswas
Publication date: 28-11-2019
Publisher: Springer Berlin Heidelberg
Published in: Microsystem Technologies / Issue 5/2020
Print ISSN: 0946-7076
Electronic ISSN: 1432-1858
DOI: https://doi.org/10.1007/s00542-019-04701-y

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