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Erschienen in:
2012 | OriginalPaper | Buchkapitel
3D Hardware Canaries
verfasst von : Sébastien Briais, Stéphane Caron, Jean-Michel Cioranesco, Jean-Luc Danger, Sylvain Guilley, Jacques-Henri Jourdan, Arthur Milchior, David Naccache, Thibault Porteboeuf
Erschienen in: Cryptographic Hardware and Embedded Systems – CHES 2012
Verlag: Springer Berlin Heidelberg
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3D integration is a promising advanced manufacturing process offering a variety of new hardware security protection opportunities. This paper presents a way of securing 3D ICs using Hamiltonian paths as hardware integrity verification sensors. As 3D integration consists in the stacking of many metal layers, one can consider surrounding a security-sensitive circuit part by a wire cage.
After exploring and comparing different cage construction strategies (and reporting preliminary implementation results on silicon), we introduce a ”hardware canary”. The canary is a spatially distributed chain of functions
F
i
positioned at the vertices of a 3D cage surrounding a protected circuit. A correct answer (
F
n
∘ … ∘
F
1
)(
m
) to a challenge
m
attests the canary’s integrity.