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Erschienen in:
2015 | OriginalPaper | Buchkapitel
94. A Design of Multi-rate Matched uPP Based on FPGA
verfasst von : Donghui Huang, Chaohai Li, Jiefeng Wang, Shangce Yuan
Erschienen in: The Proceedings of the Third International Conference on Communications, Signal Processing, and Systems
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Abstract
The design of spectrum monitoring receiver usually use FPGA (Field Programmable Gate Arrays) + DSP (Digital Signal Processor) hardware model, which requires the baseband data and spectral data under different bandwidths can be real-time transmitted between the FPGA and DSP. According to the characteristics of the receiver, a multi-rate matched universal parallel port (uPP), which is used to transmit data between FPGA and DSP, is implemented in this paper. The port achieves a high-speed data transmission, which is up to 150 MBtye/s with only 20 I/O lines. The adaptation of different input data rates is implemented by a ping-pong buffer in dual-FIFO (First In First Out).