A Flexible Hierarchical Approach for Controlling the System-Level Design Complexity of Embedded Systems

This paper summarizes results of the PhD theses on system-level design of embedded systems at the Institute Integrated Circuits and Systems Lab under the survey of Prof. Dr.-Ing. Sorin Huss. A straightforward identification of suited system-level implementations of distributed embedded systems is increasingly restricted by the complexity of the solution space and the size of modern systems. Therefore, concepts are mandatory, which are able to control the design complexity and assist the reuse of components. A hierarchical, task-based design approach and two algorithms are developed, which allow to derive dynamically partial specification models for design space exploration on different levels of detail as well as task descriptions for IP encapsulation So, the descriptive complexity of specifications is considerably reduced and the execution time of system-level synthesis algorithm can be adopted to the current requirements of the designer. The task behavior is captured by Input/Output Relations, which represent a very general and powerful means of encapsulating internal implementation details and of describing data as well as control-flow information on different levels of detail. The necessity of these concepts are demonstrated by means of an MP3 decoder application example.