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Erschienen in:
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2015 | OriginalPaper | Buchkapitel

An Efficient 64-Point IFFT Hardware Module Design

verfasst von : Danijela Efnusheva, Aristotel Tentov, Natasha Tagasovska

Erschienen in: New Trends in Networking, Computing, E-learning, Systems Sciences, and Engineering

Verlag: Springer International Publishing

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Abstract

This paper presents the process of designing a 64-point IFFT hardware module, as a 2D structure of 8-point IFFT pipeline modules. The proposed 64-point IFFT module utilizes only two 8-point IFFT modules, which include minimal number of multiplications and additions, and as well provides parallel processing of eight symbols in each pipeline phase. This allows high throughput performances of the proposed 64-point IFFT module and chip area savings of its hardware implementation on Virtex 5 FPGA. The realized hardware design can be easily applied in a high-speed real-time system, such as OFDM-based communication system.

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Vorheriges Kapitel Recent Trends and Developments for Standardization of Video Quality Assessment Metrics
Nächstes Kapitel The Relationship Between Psychological Distress and Human Computer Interaction Parameters: Linear or Non-linear?
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Metadaten
Titel
An Efficient 64-Point IFFT Hardware Module Design
verfasst von
Danijela Efnusheva
Aristotel Tentov
Natasha Tagasovska
Copyright-Jahr
2015
Buch
New Trends in Networking, Computing, E-learning, Systems Sciences, and Engineering

Print ISBN: 978-3-319-06763-6

Electronic ISBN: 978-3-319-06764-3

Copyright-Jahr: 2015

DOI
https://doi.org/10.1007/978-3-319-06764-3_59

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