2015 | OriginalPaper | Buchkapitel
An On-chip Interconnection QoS Verification Platform of Processor of Large Data for Architectural Modeling Analysis
verfasst von : Li Qinghua, Qin Jilong, Ding Xu, Wang Endong, Gong Weifeng
Erschienen in: Intelligent Computation in Big Data Era
Verlag: Springer Berlin Heidelberg
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This paper presents introduction for a QoS verification of on-chip interconnection based on the new progress of the industry, which combined with an AMD processor chip design for big data. Some verification experience in architectural modeling and simulation of on-chip interconnection is also introduced in this paper.