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Erschienen in:
Configurable Models and Design Space Exploration for Low-Latency Approximate Adders Kapitel lesen Erstes Kapitel lesen

2019 | OriginalPaper | Buchkapitel

12. Approximate Multi-Accelerator Tiled Architecture for Energy-Efficient Motion Estimation

verfasst von : Bharath Srinivas Prabakaran, Walaa El-Harouni, Semeen Rehman, Muhammad Shafique

Erschienen in: Approximate Circuits

Verlag: Springer International Publishing

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Abstract

Video processing applications are inherently error resilient. This resilience comes from the fact that: (1) inputs obtained are noisy and highly correlated in the spatial and temporal domains, (2) probabilistic computational algorithms in HEVC are inherently noise tolerant with error masking capabilities, and finally, (3) the visual perception of the final user is limited by various psychological and environmental factors. Considering these features, we analyze the complex multimode motion-estimation module in the latest High Efficiency Video Coding (HEVC) for employing heterogeneous approximations. This chapter presents a short overview of the HEVC motion estimator with an in-depth analysis of its computational complexity and energy consumption, followed by a full-system approximate architecture for the energy-efficient motion-estimation coprocessor.

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Vorheriges Kapitel Error Analysis and Optimization in Approximate Arithmetic Circuits
Nächstes Kapitel Hardware–Software Approximations for Deep Neural Networks
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Metadaten
Titel
Approximate Multi-Accelerator Tiled Architecture for Energy-Efficient Motion Estimation
verfasst von
Bharath Srinivas Prabakaran
Walaa El-Harouni
Semeen Rehman
Muhammad Shafique
Copyright-Jahr
2019
Buch
Approximate Circuits

Print ISBN: 978-3-319-99321-8

Electronic ISBN: 978-3-319-99322-5

Copyright-Jahr: 2019

DOI
https://doi.org/10.1007/978-3-319-99322-5_12

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