Charge Plasma-Based Phosphorene Tunnel FET Using a Hybrid Computational Method

In this paper, a charge plasma-based phosphorene double-gate tunnel FET (CP-BPDGTFET) is investigated. A hybrid simulation technique involving both atomistic and technology computer-aided design (TCAD) has been used to simulate the device characteristics. First, the density functional theory has been used to simulate phosphorene electrical characteristics (monolayer to few-layer, including armchair and zigzag directions). The parameters such as band gap and effective mass obtained using an atomistic simulator tool are exported into Sentaurus TCAD to simulate the device characteristics. The drain current characteristics are calibrated for conventional double gate phosphorene tunnel FET with non-equilibrium Green's function results. The DC characteristics of the proposed device are studied. The device performance is analysed by varying the device parameters such as gate length (L_g), spacer length (L_s), and gate workfunction (ϕ_m). Based on the study, an optimised device is designed, and its characteristics are obtained. The optimised device offers an on-current value of 405 µA/µm, SS = 79 mV/dec, I_on/I_off = 1.13 × 10⁶ for 30 nm gate length. It establishes that CP-BPDGTFET is a suitable candidate for energy-efficient circuit applications.