2014 | OriginalPaper | Buchkapitel
DES Algorithm Realization in Asynchronous Circuit Using Four-Phase Bundled-Data
verfasst von : Jingjing Liu, Guanghua Chen, Shiwei Ma, Weimin Zeng, Mingyu Wang
Erschienen in: Life System Modeling and Simulation
Verlag: Springer Berlin Heidelberg
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In order to reduce the power consumption of the DES algorithm circuit, this paper designs an asynchronous pipeline based on the four-phase handshake protocol, and realizes the pipeline in the round to satisfy the several rounds operations. The design has been implemented by free Balsa or non-free Tangram language and fabricated with 0.18 um CMOS process. Both the asynchronous design and its synchronous are embedded into the contactless smart card chip. Compared with the synchronous circuit, the result shows that the power consumption is reduced by 40%, and the average current consumption of DES asynchronous circuits is cut down from 2.9 mA to 0.5mA.