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2018 | OriginalPaper | Buchkapitel

Design and Implementation of High Speed VLSI Architecture of Online Clustering Algorithm for Image Analysis

verfasst von : M. G. Anuradha, L. Basavaraj

Erschienen in: Data Engineering and Intelligent Computing

Verlag: Springer Singapore

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Abstract

A novel architecture for computing On-line clustering using moving average method for handling varied dimension data up to eight is proposed. The architecture proposed can perform clustering operation in a single clock cycle for any given dimension. A new method for division is proposed using parallel multiplier architecture and power of two which computes the division operation in single clock cycle. The architecture is tested for its working using Xilinx/ISim tool and the design is implemented using FPGA Spartan 3A.

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Metadaten
Titel
Design and Implementation of High Speed VLSI Architecture of Online Clustering Algorithm for Image Analysis
verfasst von
M. G. Anuradha
L. Basavaraj
Copyright-Jahr
2018
Verlag
Springer Singapore
DOI
https://doi.org/10.1007/978-981-10-3223-3_18