Ausgabe 3-4/2011
Inhalt (5 Artikel)
FTL algorithms for NAND-type flash memories
Se Jin Kwon, Arun Ranjitkar, Young-Bae Ko, Tae-Sun Chung
Enhancing IP cores specifications using hierarchical composition and set theory
Cássio L. Rodrigues, Karina R. G. da Silva, Henrique N. Cunha, Jorge C. A. de Figueiredo, Dalton D. S. Guerrero, Elmar Melcher
FPGA automatic re-synchronisation for pipelined, floating point control systems applications
Beniamin Apopei, Tony J. Dodd
HVD: horizontal-vertical-diagonal error detecting and correcting code to protect against with soft errors
Mostafa Kishani, Hamid R. Zarandi, Hossein Pedram, Alireza Tajary, Mohsen Raji, Behnam Ghavami
A retargetable framework for compiler/architecture co-development
Hanno Scharwaechter, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr