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Erschienen in:
Introduction to Fault Analysis in Cryptography Kapitel lesen Erstes Kapitel lesen

2019 | OriginalPaper | Buchkapitel

9. Differential Fault Attack Resistant Hardware Design Automation

verfasst von : Mustafa Khairallah, Jakub Breier, Shivam Bhasin, Anupam Chattopadhyay

Erschienen in: Automated Methods in Cryptographic Fault Analysis

Verlag: Springer International Publishing

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Abstract

Since fault analysis had shown that nearly all cryptographic primitives to be vulnerable, countermeasures against such attacks are becoming a necessity. Available countermeasures are either added at the algorithmic level or at the implementation level and incur performance, area and power consumption overhead. Therefore, a trade-off analysis of security and performance needs to be done during the design phase. In this chapter, we discuss an implementation-level countermeasure that can be easily automated and integrated into the commercial circuit design flows, making the task of implementing these countermeasures easier for hardware designers.

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Vorheriges Kapitel Idempotent Instructions to Counter Fault Analysis Attacks
Nächstes Kapitel Automated Evaluation of Software Encoding Schemes
Fußnoten
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Metadaten
Titel
Differential Fault Attack Resistant Hardware Design Automation
verfasst von
Mustafa Khairallah
Jakub Breier
Shivam Bhasin
Anupam Chattopadhyay
Copyright-Jahr
2019
Buch
Automated Methods in Cryptographic Fault Analysis

Print ISBN: 978-3-030-11332-2

Electronic ISBN: 978-3-030-11333-9

Copyright-Jahr: 2019

DOI
https://doi.org/10.1007/978-3-030-11333-9_9

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