Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission

In this chapter, we present a DTC-based fractional-N subsampling PLL that operates without performance gap between integer-N and fractional-N modes. This is achieved thanks to the digital background cancellation of nonlinearities in the PLL phase-error comparison path. This −247-dB FOM PLL is further enhanced for two-point, wideband phase modulation, achieving <−40-dB EVM around a 10-GHz carrier during 10-Mb/s GMSK modulation. Analog nonidealities, such as gain imbalance or nonlinearity in the digital-to-modulated phase conversion, are background cancelled, ensuring robust operation with PVT. This system demonstrates state-of-the-art performance in nanoscale CMOS for fractional-N synthesis and phase modulation.

Thanks to the extreme connectedness of today’s world, it is easier than ever to transfer information and to communicate (The quality of information content is out of this book’s scope.). Wireless links normally use transceivers with a local oscillator in their heart that is typically implemented as a PLL. Reliable and pristine PLL output frequency beat is of crucial importance for the efficient spectrum usage—and higher-order modulation schemes (at large bandwidths) are required to satisfy the end-users growing hunger for fast data throughput. The PLL’s phase noise and spurious content indeed impose the fundamental limit to the density with which the information can be transmitted. Besides the exclusive LO generation, a PLL can be the basis for compact and power-efficient polar transmission. Polar TX architecture is an attractive, digitally intensive solution that simultaneously comes with a set of severe design challenges (such as bandwidth limitation and linearity) that need to be carefully tackled when targeting high-speed communication. This book offers contributions to the state of the art in fractional frequency synthesis and polar transmitter design. The presented material is built around three 28-nm bulk CMOS IC prototypes that investigate and push the boundaries of the field.