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2019 | OriginalPaper | Chapter

3. InvadeSIM-A Simulation Framework for Invasive Parallel Programs and Architectures

Authors : Sascha Roloff, Frank Hannig, Jürgen Teich

Published in: Modeling and Simulation of Invasive Applications and Architectures

Publisher: Springer Singapore

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Abstract

In this chapter novel, fast, and flexible simulation techniques for modern heterogeneous NoC-based multi-core architectures are presented. They include the design and development of the full-system simulator InvadeSIM, which allows modeling complex MPSoC architectures, emulating the execution behavior of the runtime system, and simulating function and timing of invasive parallel applications apart from utilization, efficiency, and competition. A novel high-level processor simulation approach based on direct-execution and a linear timing estimation model is proposed that tackles the complexity and the heterogeneity of current multi and many-core architectures. Furthermore, a discrete-event simulation framework is presented, which allows integrating and synchronizing different simulation tasks such as software or hardware simulations. Besides processor simulation, exemplary timing models for hardware accelerators such as tightly-coupled processor arrays and special cores with instruction-set extensions are presented.

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previous chapter Fundamentals

next chapter Hybrid Network-on-Chip Simulation

Considered as realistic workloads are invasive X10 applications that dynamically request, release, and occupy computation and communication resources using InvadeX10.

Retired instructions are the actual number of instructions that have been executed for a particular program flow, i.e., without speculative executed instructions.

Causality describes the relationship between cause and consequence for a sequence of associated events. If event B is induced by event A, then, A is the cause of the consequence B and emerged temporally earlier than B. The inversion of this principle is called causality error. An example might be if the reply of a communication request arrives earlier than the request was sent.

Assuming a round-robin bus arbitration (no prioritization).

Perfect tiling is assumed.

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Title: InvadeSIM-A Simulation Framework for Invasive Parallel Programs and Architectures
Authors: Sascha Roloff
Frank Hannig
Jürgen Teich
Publisher: Springer Singapore
Book: Modeling and Simulation of Invasive Applications and Architectures
Print ISBN: 978-981-13-8386-1

Electronic ISBN: 978-981-13-8387-8

Copyright Year: 2019
DOI: https://doi.org/10.1007/978-981-13-8387-8_3